Datasheet

PCA8565 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 5 December 2014 18 of 48
NXP Semiconductors
PCA8565
Real time clock/calendar
8.9.1.1 Clearing the alarm flag (AF)
Table 28
shows an example for clearing bit AF but leaving bit TF unaffected. Clearing the
flags is made by a write command; therefore bits 7, 6, 4, 1 and 0 must be written with their
previous values. Repeatedly re-writing these bits has no influence on the functional
behavior.
To prevent the timer flags being overwritten while clearing AF, a logical AND is performed
during a write access. Writing a logic 1 will cause the flag to maintain its value, whereas
writing a logic 0 will cause the flag to be reset.
The following table shows what instruction must be sent to clear bit AF. In this example bit
TF is unaffected.
8.9.2 Bits TIE and AIE
These bits activate or deactivate the generation of an interrupt when TF or AF is asserted
respectively. The interrupt is the logical OR of these two conditions when both AIE and
TIE are set.
When bits TIE and AIE are disabled, pin INT will remain high-impedance.
Fig 9. Interrupt scheme
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Table 27. Flag location in register Control_2
Register Bit
7 6 5 4 3 2 1 0
Control_2----AFTF--
Table 28. Example to clear only AF (bit 3) in register Control_2
Register Bit
7 6 5 4 3 2 1 0
Control_2----01--