PCA8565 Real time clock/calendar Rev. 4 — 5 December 2014 Product data sheet 1. General description The PCA8565 is a CMOS1 real time clock and calendar optimized for low power consumption. A programmable clock output, interrupt output and voltage-low detector are also provided. All address and data are transferred serially via a two-line bidirectional I2C-bus. Maximum bus speed is 400 kbit/s. The built-in word address register is incremented automatically after each written or read data byte.
PCA8565 NXP Semiconductors Real time clock/calendar 4. Ordering information Table 1. Ordering information Type number Package PCA8565TS Name Description Version TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm SOT505-1 4.1 Ordering options Table 2.
PCA8565 NXP Semiconductors Real time clock/calendar 6. Block diagram 26&, 26&,//$725 N+] ',9,'(5 &/.287 &/2&. 287 26&2 &21752/ 021,725 K &RQWUROB K &RQWUROB 'K &/.
PCA8565 NXP Semiconductors Real time clock/calendar 7. Pinning information 7.1 Pinning 26&, 9'' 26&2 &/.287 ,17 6&/ 966 6'$ 3&$ 76 DDM Top view. For mechanical details see Figure 28. Fig 2. Pin configuration of PCA8565TS (TSSOP8) 7.2 Pin description Table 4. Pin description Input or input/output pins must always be at a defined level (VSS or VDD) unless otherwise specified.
PCA8565 NXP Semiconductors Real time clock/calendar 8. Functional description The PCA8565 contains sixteen 8-bit registers with an auto-incrementing address register, an on-chip 32.768 kHz oscillator with one integrated capacitor, a frequency divider which provides the source clock for the Real Time Clock (RTC), a programmable clock output, a timer, an alarm, a voltage-low detector and a 400 kHz I2C-bus interface.
PCA8565 NXP Semiconductors Real time clock/calendar 8.1 Register overview Table 5. Register overview and control bits default values Bit positions labeled as - are not implemented. Bit positions labeled as N should always be written with logic 0. Reset values are shown in Table 8.
PCA8565 NXP Semiconductors Real time clock/calendar 8.2 Control registers 8.2.1 Register Control_1 Table 6. Bit 7 Register Control_1 (address 00h) bits description Symbol Value Description TEST1 0[1] normal mode 1 EXT_CLK test mode default value RTC source clock runs 6 N 0[2] 5 STOP 0[1] 1 all RTC divider chain flip-flops are asynchronously set to logic 0; the RTC clock is stopped (CLKOUT at 32.
PCA8565 NXP Semiconductors Real time clock/calendar 8.3 Reset The PCA8565 includes an internal reset circuit which is active whenever the oscillator is stopped. In the reset state the I2C-bus logic is initialized including the address pointer. All other registers are set according to Table 8. Table 8.
PCA8565 NXP Semiconductors Real time clock/calendar QV QV 6'$ 6&/ PV SRZHU RQ Fig 3. RYHUULGH DFWLYH PJP POR override sequence 8.4 Time and date registers The majority of the registers are coded in the BCD format to simplify application use. 8.4.1 Register Seconds Table 9.
PCA8565 NXP Semiconductors Real time clock/calendar PJU 9'' QRUPDO SRZHU RSHUDWLRQ SHULRG RI EDWWHU\ RSHUDWLRQ 9ORZ 9/ VHW Fig 4. W Voltage-low detection 8.4.2 Register Minutes Table 11. Register Minutes (address 03h) bits description Bit Symbol Value Place value Description 7 - - - unused 6 to 4 MINUTES 0 to 5 ten’s place actual minutes coded in BCD format 3 to 0 0 to 9 unit place 8.4.3 Register Hours Table 12.
PCA8565 NXP Semiconductors Real time clock/calendar Table 15. Weekday assignments Day[1] Bit 2 1 0 Sunday 0 0 0 Monday 0 0 1 Tuesday 0 1 0 Wednesday 0 1 1 Thursday 1 0 0 Friday 1 0 1 Saturday 1 1 0 [1] Definition may be re-assigned by the user. 8.4.6 Register Months_century Table 16.
PCA8565 NXP Semiconductors Real time clock/calendar 8.4.7 Register Years Table 18. Bit Register Years (08h) bits description Symbol Value Place value Description 7 to 4 YEARS 0 to 9 ten’s place 3 to 0 0 to 9 unit place actual year coded in BCD format 8.5 Setting and reading the time Figure 5 shows the data flow and data dependencies starting from the 1 Hz clock tick. +] WLFN 6(&21'6 0,187(6 +2856 /($3 <($5 &$/&8/$7,21 '$<6 :((.'$< 0217+6 <($56 & Fig 5.
PCA8565 NXP Semiconductors Real time clock/calendar W V 67$57 6/$9( $''5(66 '$7$ '$7$ 6723 DDD Fig 6. Access time for read/write operations As an example, if the time (seconds through to hours) is set in one access and then in a second access the date is set, it is possible that the time may increment between the two accesses. A similar problem exists when reading. A roll over may occur between reads thus giving the minutes from one moment and the hours from the next.
PCA8565 NXP Semiconductors Real time clock/calendar FKHFN QRZ VLJQDO H[DPSOH $(1B0 $(1B0 0,187( $/$50 0,187( 7,0( $(1B+ +285 $/$50 +285 7,0( VHW DODUP IODJ $) $(1B' '$< $/$50 '$< 7,0( $(1B: :((.'$< $/$50 DDD :((.'$< 7,0( (1) Only when all enabled alarm settings are matching. It’s only on increment to a matched case that the alarm is set, see Section 8.9.1.1. Fig 7. Alarm function block diagram 8.6.1 Register Minute_alarm Table 19.
PCA8565 NXP Semiconductors Real time clock/calendar 8.6.3 Register Day_alarm Table 21. Register Day_alarm (address 0Bh) bits description Bit Symbol Value Place value Description 7 AE_D 0 - day alarm is enabled 1[1] - day alarm is disabled - - unused 5 to 4 DAY_ALARM 0 to 3 ten’s place 3 to 0 0 to 9 unit place day alarm information coded in BCD format 6 [1] - Default value. 8.6.4 Register Weekday_alarm Table 22.
PCA8565 NXP Semiconductors Real time clock/calendar Table 23. Bit 7 Register Timer_control (address 0Eh) bits description Symbol Value Description TE 0[1] timer is disabled 6 to 2 - 1 timer is enabled - unused timer source clock frequency select[2] 1 to 0 TD[1:0] 00 4.096 kHz 01 64 Hz 10 1 Hz 11[2] 1⁄ 60 Hz [1] Default value. [2] These bits determine the source clock for the countdown timer; when not in use, TD[1:0] should be set to 1⁄ Hz for power saving. 60 8.7.
PCA8565 NXP Semiconductors Real time clock/calendar Table 26. Register CLKOUT_control (address 0Dh) bits description Bit Symbol Value Description 7 FE 0 the CLKOUT output is inhibited and CLKOUT output is set to high-impedance 1[1] the CLKOUT output is activated - unused 6 to 2 1 to 0 FD[1:0] [1] frequency output at pin CLKOUT 00[1] 32.768 kHz 01 1.024 kHz 10 32 Hz 11 1 Hz Default value. 8.9 Interrupt output 8.9.1 Bits TF and AF When an alarm occurs, AF is set to 1.
PCA8565 NXP Semiconductors Real time clock/calendar 7,B73 7( WR LQWHUIDFH UHDG 7) 7) 7,0(5 &2817'2:1 &2817(5 H J $,( 7,( 6(7 &/($5 38/6( *(1(5$725 75,**(5 &/($5 ,17 IURP LQWHUIDFH FOHDU 7) VHW DODUP IODJ $) $,( WR LQWHUIDFH UHDG $) $) $/$50 )/$* 6(7 &/($5 IURP LQWHUIDFH FOHDU $) DDD When bits TIE and AIE are disabled, pin INT will remain high-impedance. Fig 9. Interrupt scheme 8.9.1.
PCA8565 NXP Semiconductors Real time clock/calendar 8.9.3 Countdown timer interrupts The pulse generator for the countdown timer interrupt uses an internal clock and is dependent on the selected source clock for the countdown timer and on the countdown value n. As a consequence, the width of the interrupt pulse varies (see Table 29). Table 29.
PCA8565 NXP Semiconductors Real time clock/calendar 8.11 STOP bit function The function of the STOP bit is to allow for accurate starting of the time circuits. The STOP bit function will cause the upper part of the prescaler (F2 to F14) to be held in reset and thus no 1 Hz ticks will be generated (see Figure 10). The time circuits can then be set and will not increment until the STOP bit is released (see Figure 11 and Table 30).
PCA8565 NXP Semiconductors Real time clock/calendar Table 30. First increment of time circuits after STOP bit release Bit Prescaler bits STOP F0F1-F2 to F14 [1] 1 Hz tick Time Comment hh:mm:ss Clock is running normally 0 12:45:12 01-0 0001 1101 0100 prescaler counting normally STOP bit is activated by user.
PCA8565 NXP Semiconductors Real time clock/calendar 9. Characteristics of the I2C-bus The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a Serial Data Line (SDA) and a Serial CLock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy. 9.1 Bit transfer One data bit is transferred during each clock pulse.
PCA8565 NXP Semiconductors Real time clock/calendar 6'$ 6&/ 0$67(5 75$160,77(5 5(&(,9(5 6/$9( 75$160,77(5 5(&(,9(5 6/$9( 5(&(,9(5 0$67(5 75$160,77(5 5(&(,9(5 0$67(5 75$160,77(5 PED Fig 14. System configuration 9.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge cycle.
PCA8565 NXP Semiconductors Real time clock/calendar 9.5 I2C-bus protocol 9.5.1 Addressing Before any data is transmitted on the I2C-bus, the device which should respond is addressed first. The addressing is always carried out with the first byte transmitted after the start procedure. The PCA8565 acts as a slave receiver or slave transmitter. Therefore the clock signal SCL is only an input signal, but the data signal SDA is a bidirectional line. The PCA8565 slave address is shown in Figure 16.
PCA8565 NXP Semiconductors Real time clock/calendar DFNQRZOHGJHPHQW IURP VODYH 6 6/$9( $''5(66 $ DFNQRZOHGJHPHQW IURP VODYH :25' $''5(66 5 : $ 6 DFNQRZOHGJHPHQW IURP VODYH 6/$9( $''5(66 DW WKLV PRPHQW PDVWHU WUDQVPLWWHU EHFRPHV PDVWHU UHFHLYHU DQG 3&$ VODYH UHFHLYHU EHFRPHV VODYH WUDQVPLWWHU DFNQRZOHGJHPHQW IURP PDVWHU $ '$7$ $ Q E\WHV 5 : DXWR LQFUHPHQW PHPRU\ ZRUG DGGUHVV QR DFNQRZOHGJHPHQW IURP PDVWHU '$7$ 3 ODVW E\WH DXWR LQFUHPHQW PHPRU\ ZRUG DGGUHVV
PCA8565 NXP Semiconductors Real time clock/calendar W: V :' WLPHU GDWD WLPH FRXQWHUV :' WLPHU UXQQLQJ YDOLG VODYH DGGUHVV UXQQLQJ GDWD GDWD GDWD WLPH FRXQWHUV IUR]HQ UXQQLQJ DDD a. Correct data transfer: read or write V W: V :' WLPHU GDWD WLPH FRXQWHUV :' WLPHU UXQQLQJ YDOLG VODYH DGGUHVV GDWD UXQQLQJ GDWD GDWD :' WULSV GDWD WUDQVIHU IDLO WLPH FRXQWHUV IUR]HQ UXQQLQJ DDD b. Incorrect data transfer: read or write Fig 20.
PCA8565 NXP Semiconductors Real time clock/calendar 10. Internal circuitry 9'' 26&, &/.287 26&2 6&/ ,17 966 6'$ 3&$ PFH Fig 21. Device diode protection diagram of PCA8565 11. Safety notes CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling electrostatic sensitive devices. Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or equivalent standards.
PCA8565 NXP Semiconductors Real time clock/calendar 12. Limiting values Table 31. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). PCA8565 Product data sheet Symbol Parameter VDD Conditions Min Max Unit supply voltage 0.5 +6.5 V ISS ground supply current 50 +50 mA IDD supply current 50 +50 mA VI input voltage 0.5 +6.
PCA8565 NXP Semiconductors Real time clock/calendar 13. Static characteristics Table 32. Static characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +125 C; fosc = 32.768 kHz; quartz Rs = 40 k; CL = 8 pF; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 1.8 - 5.5 V for clock data integrity Vlow - 5.5 V - 0.9 1.7 V - - 820 A - - 220 A VDD = 5.0 V - 750 1500 nA VDD = 4.0 V - 700 1400 nA VDD = 3.
PCA8565 NXP Semiconductors Real time clock/calendar Table 32. Static characteristics …continued VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +125 C; fosc = 32.768 kHz; quartz Rs = 40 k; CL = 8 pF; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit on pin SDA 3 - - mA on pin INT 1 - - mA 1 - - mA 1 0 +1 A Outputs LOW-level output current output sink current IOL VOL = 0.
PCA8565 NXP Semiconductors Real time clock/calendar POG POG ,'' $ IUHTXHQF\ GHYLDWLRQ SSP 7 & VDD = 3 V; Timer = 1 minute; CLKOUT = 32 kHz. Fig 24. IDD as a function of temperature PCA8565 Product data sheet 9'' 9 Tamb = 25 C; normalized to VDD = 3 V. Fig 25. Frequency deviation as a function of VDD All information provided in this document is subject to legal disclaimers. Rev.
PCA8565 NXP Semiconductors Real time clock/calendar 14. Dynamic characteristics Table 33. Dynamic characteristics VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = 40 C to +125 C; fosc = 32.768 kHz; quartz Rs = 40 k; CL = 8 pF; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit 15 25 35 pF - 0.2 - ppm Oscillator [1] CL(itg) integrated load capacitance fosc/fosc relative oscillator frequency variation VDD = 200 mV; Tamb = 25 C Quartz crystal parameters (f = 32.
PCA8565 NXP Semiconductors Real time clock/calendar 6'$ W%8) W/2: WI 6&/ W+' 67$ WU W+' '$7 W+,*+ W68 '$7 6'$ W68 67$ W68 672 PJD Fig 26. I2C-bus timing waveforms 15. Application information 9'' 6'$ ) Q) 6&/ 9'' 0$67(5 75$160,77(5 5(&(,9(5 6&/ &/2&. &$/(1'$5 26&, 3&$ 26&2 966 9'' 6'$ 5 6'$ 6&/ , & EXV 5 PFH Fig 27. Application diagram of PCA8565 PCA8565 Product data sheet All information provided in this document is subject to legal disclaimers.
PCA8565 NXP Semiconductors Real time clock/calendar 15.1 Quartz frequency adjustment 15.1.1 Method 1: fixed OSCI capacitor By evaluating the average capacitance necessary for the application layout, a fixed capacitor can be used. The frequency is best measured via the 32.768 kHz signal available after power-on at pin CLKOUT. The frequency tolerance depends on the quartz crystal tolerance, the capacitor tolerance and the device-to-device tolerance (on average f f = 5 10 –6 ).
PCA8565 NXP Semiconductors Real time clock/calendar 17.
PCA8565 NXP Semiconductors Real time clock/calendar 18. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent standards. PCA8565 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 5 December 2014 © NXP Semiconductors N.V. 2014.
PCA8565 NXP Semiconductors Real time clock/calendar 19. Packing information 19.1 Tape and reel information For tape and reel packing information, please see Ref. 10 “SOT505-1_118” and Ref. 11 “SOT505-1_518” on page 42 20. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 20.
PCA8565 NXP Semiconductors Real time clock/calendar 20.3 Wave soldering Key characteristics in wave soldering are: • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 20.
PCA8565 NXP Semiconductors Real time clock/calendar temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 29. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”.
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx NXP Semiconductors PCA8565 Product data sheet 21. Appendix 21.1 Real-Time Clock selection Table 36.
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PCA8565 NXP Semiconductors Real time clock/calendar 22. Abbreviations Table 37. Abbreviations Acronym Description BCD Binary Coded Decimal CDM Charged-Device Model CMOS Complementary Metal Oxide Semiconductor HBM Human Body Model I2C Inter-Integrated Circuit IC Integrated Circuit MSB Most Significant Bit MSL Moisture Sensitivity Level PCB Printed-Circuit Board POR Power-On Reset RC Resistance and Capacitance RTC Real Time Clock SMD Surface Mount Device 23.
PCA8565 NXP Semiconductors Real time clock/calendar 24. Revision history Table 38. Revision history Document ID Release date Data sheet status Change notice Supersedes PCA8565 v.4 20141205 Product data sheet - PCA8565 v.3 Modifications: • Corrected Figure 27 PCA8565 v.3 20140901 Product data sheet - PCA8565 v.2 PCA8565 v.2 20090616 Product data sheet - PCA8565 v.1 PCA8565 v.
PCA8565 NXP Semiconductors Real time clock/calendar 25. Legal information 25.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
PCA8565 NXP Semiconductors Real time clock/calendar No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only.
PCA8565 NXP Semiconductors Real time clock/calendar 27. Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Ordering information . . . . . . . . . . . . . . . . . . . . .
PCA8565 NXP Semiconductors Real time clock/calendar 28. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. Fig 18. Fig 19. Fig 20. Fig 21. Fig 22. Fig 23. Fig 24. Fig 25. Fig 26. Fig 27. Fig 28. Fig 29. Block diagram of PCA8565 . . . . . . . . . . . . . . . . . .3 Pin configuration of PCA8565TS (TSSOP8) . . . . .4 POR override sequence . . . . . . . . . . . . . . . . . . . .9 Voltage-low detection. . . . . . . . . . . .
PCA8565 NXP Semiconductors Real time clock/calendar 29. Contents 1 2 3 4 4.1 5 6 7 7.1 7.2 8 8.1 8.2 8.2.1 8.2.2 8.3 8.3.1 8.4 8.4.1 8.4.1.1 8.4.2 8.4.3 8.4.4 8.4.5 8.4.6 8.4.7 8.5 8.6 8.6.1 8.6.2 8.6.3 8.6.4 8.7 8.7.1 8.7.2 8.8 8.9 8.9.1 8.9.1.1 8.9.2 8.9.3 8.10 8.11 9 9.1 9.2 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . .