Datasheet
PCA6408A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 27 September 2012 26 of 40
NXP Semiconductors
PCA6408A
Low-voltage, 8-bit I
2
C-bus and SMBus I/O expander
a. P port load configuration
b. Write mode (R/W =0)
c. Read mode (R/W
=1)
C
L
includes probe and jig capacitance.
t
v(Q)
is measured from 0.7 V
DD
on SCL to 50 % I/O (Pn) output.
All inputs are supplied by generators having the following characteristics: PRR 10 MHz; Z
o
=50; t
r
/t
f
30 ns.
The outputs are measured one at a time, with one transition per measurement.
All parameters and waveforms are not applicable to all devices.
Fig 28. P port load circuit and voltage waveforms
002aag981
DUT
C
L
= 50 pF
500 Ω
Pn
2 × V
DD(P)
500 Ω
002aag982
SCL
SDA
P0 A
t
v(Q)
0.3 × V
DD(I2C-bus)
0.7 × V
DD(I2C-bus)
P7
last stable bit
unstable
data
Pn
002aag983
SCL
Pn
P0 A
t
h(D)
0.3 × V
DD(I2C-bus)
0.7 × V
DD(I2C-bus)
P7
0.5 × V
DD(P)
t
su(D)
