Datasheet

PBSS8110D_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 11 December 2009 3 of 12
NXP Semiconductors
PBSS8110D
100 V, 1 A NPN low V
CEsat
(BISS) transistor
5. Limiting values
[1] Device mounted on a FR4 printed-circuit board, single-sided copper, tin-plated, standard footprint.
[2] Device mounted on a FR4 printed-circuit board, single-sided copper, tin-plated, 1cm
2
collector mounting
pad.
[3] Device mounted on a FR4 printed-circuit board, single-sided copper, tin-plated, 6cm
2
collector mounting
pad.
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CBO
collector-base voltage open emitter - 120 V
V
CEO
collector-emitter voltage open base - 100 V
V
EBO
emitter-base voltage open collector - 5 V
I
CM
peak collector current T
j(max)
-3A
I
C
continuous collector current - 1 A
I
B
continuous base current - 0.3 A
P
tot
total power dissipation T
amb
≤ 25 °C
[1]
-300mW
[2]
-550mW
[3]
-700mW
T
j
junction temperature - 150 °C
T
amb
operating ambient temperature −65 +150 °C
T
stg
storage temperature −65 +150 °C
(1) FR4 PCB; 6cm
2
collector mounting pad
(2) FR4 PCB; 1cm
2
collector mounting pad
(3) FR4 PCB; standard footprint
Fig 1. Power derating curves
T
amb
(°C)
0 16012040 80
001aaa493
400
200
600
800
P
tot
(mW)
0
(3)
(2)
(1)