Datasheet

PBSS4350SPN_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 5 April 2007 6 of 19
NXP Semiconductors
PBSS4350SPN
50 V, 2.7 A NPN/PNP low V
CEsat
(BISS) transistor
FR4 PCB, mounting pad for collector 1 cm
2
Fig 3. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
Ceramic PCB, Al
2
O
3
, standard footprint
Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aaa810
10
1
10
2
10
3
Z
th(j-a)
(K/W)
10
−1
10
−5
1010
−2
10
−4
10
2
10
−1
t
p
(s)
10
−3
10
3
1
duty cycle =
0.01
0
0.02
0.05
0.1
0.2
0.33
0.5
0.75
1.0
006aaa811
t
p
(s)
10
−4
10
2
10
3
10110
−3
10
−1
10
−2
10
2
10
10
3
Z
th(j-a)
(K/W)
1
0.02
0.05
0.1
0.2
0.33
0.5
0.75
1.0
0
0.01
duty cycle =