Datasheet

PBSS4021SPN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 13 October 2010 16 of 20
NXP Semiconductors
PBSS4021SPN
20 V NPN/PNP low V
CEsat
(BISS) transistor
11. Soldering
Fig 26. Reflow soldering footprint SOT96-1 (SO8)
Fig 27. Wave soldering footprint SOT96-1 (SO8)
sot096-1_
fr
occupied area
solder lands
Dimensions in mm
placement accuracy ± 0.25
1.30
0.60 (8×)
1.27 (6×)
4.00 6.60
5.50
7.00
sot096-1_
fw
solder resist
occupied area
solder lands
Dimensions in mm
board direction
placement accurracy ± 0.25
4.00
5.50
1.30
0.3 (2×)
0.60 (6×)
1.20 (2×)
1.27 (6×)
7.00
6.60
enlarged solder land