Datasheet

PBRP113ET_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 17 December 2007 2 of 12
NXP Semiconductors
PBRP113ET
PNP 800 mA, 40 V BISS RET; R1 = 1 kΩ, R2 = 1 kΩ
2. Pinning information
3. Ordering information
4. Marking
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 2. Pinning
Pin Description Simplified outline Symbol
1 input (base)
2 GND (emitter)
3 output (collector)
12
3
sym003
3
2
1
R1
R2
Table 3. Ordering information
Type number Package
Name Description Version
PBRP113ET - plastic surface-mounted package; 3 leads SOT23
Table 4. Marking codes
Type number Marking code
[1]
PBRP113ET *7K
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CBO
collector-base voltage open emitter - −40 V
V
CEO
collector-emitter voltage open base - −40 V
V
EBO
emitter-base voltage open collector - −10 V
V
I
input voltage
positive - +10 V
negative - −10 V
I
O
output current
[1][2]
- −600 mA
I
ORM
repetitive peak output current t
p
≤ 1 ms;
δ≤0.33
[3]
- −800 mA