Datasheet

PBRN113E_SER_1 © NXP B.V. 2007. All rights reserved.
Product data sheet Rev. 01 — 1 March 2007 2 of 17
NXP Semiconductors
PBRN113E series
NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 1 kΩ
[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
2. Pinning information
I
ORM
repetitive peak output current
PBRN113EK, PBRN113ET t
p
≤ 1 ms; δ≤0.33 - - 800 mA
R1 bias resistor 1 (input) 0.7 1 1.3 kΩ
R2/R1 bias resistor ratio 0.9 1 1.1
Table 2. Quick reference data
…continued
Symbol Parameter Conditions Min Typ Max Unit
Table 3. Pinning
Pin Description Simplified outline Symbol
SOT54
1 input (base)
2 output (collector)
3 GND (emitter)
SOT54A
1 input (base)
2 output (collector)
3 GND (emitter)
SOT54 variant
1 input (base)
2 output (collector)
3 GND (emitter)
SOT23; SOT346
1 input (base)
2 GND (emitter)
3 output (collector)
001aab347
1
2
3
006aaa145
2
3
1
R1
R2
001aab348
1
2
3
006aaa145
2
3
1
R1
R2
001aab447
1
2
3
006aaa145
2
3
1
R1
R2
006aaa144
12
3
sym007
3
2
1
R1
R2