Datasheet

Philips Semiconductors Product specification
80C51/87C51/80C52/87C52
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
2000 Aug 07
31
Table 9. Program Security Bits for EPROM Devices
PROGRAM LOCK BITS
1, 2
SB1 SB2 SB3 PROTECTION DESCRIPTION
1 U U U No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
2 P U U MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
3 P P U Same as 2, also verify is disabled.
4 P P P Same as 3, external execution is disabled. Internal data RAM is not accessible.
NOTES:
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
A0–A7
1
1
1
4–6MHz
+5V
PGM DATA
+12.75V
5 PULSES TO GROUND
0
1
0
A8–A12
P1
RST
P3.6
P3.7
XTAL2
XTAL1
V
SS
V
CC
P0
EA
/V
PP
ALE/PROG
PSEN
P2.7
P2.6
P2.0–P2.5
EPROM/OTP
SU00873
Figure 26. Programming Configuration
ALE/PROG:
ALE/PROG:
1
0
1
0
5 PULSES
t
GLGH
= 100µs±10µs
t
GHGL
= 10µs MIN
SU00875
12345
SEE EXPLODED VIEW BELOW
1
Figure 27. PROG Waveform