Datasheet

Product data sheet Rev. 3 — 4 November 2011 4 of 20

NXP Semiconductors

NX5DV715

Dual supply 1-of-2 VGA switch

[1] Test pin used to enable test mode. For normal usage, this pin must be connected to V

CC(A)

7. Functional description

The NX5DV715 integrates high-bandwidth SPDT switches, level-translating buffers and

level translating SPDT switches to provide a complete solution for 1-to-2 switching of VGA

signals. An enable input (EN) is used to enable or disable the device and a select input

(SEL) is used to determine which output is selected. When EN = LOW the device is

disabled; all switches will be off, pull-up resistors will be disabled and H1, V1, H2, V2 will

be forced LOW.

7.1 RGB switches

The NX5DV715 provides three identical single pole double throw high-bandwidth switches

to route standard VGA RGB signals (see Table 3

7.2 H-Sync/V-Sync level translator

The horizontal and vertical synchronization buffers have inputs (H0, V0) referenced to

CC(A)

and outputs (H1, V1 and H2, V2) that are referenced to V

CC(B)

. This allows level

translation of synchronization signals from as low as 2.0 V up to 5.5 V and supports

low-voltage CMOS or TTL-compatible graphics controllers meeting the VESA

specification for output drive of 8 mA. The EN input also controls the level shifter (See

Table 4

R1, G1, B1, R2, G2, B2 27, 25, 22, 26, 24, 21 RGB input or output

TEST

[1]

29 test pin (active LOW)

SEL 30 select input

Table 2. Pin description …continued

Symbol Pin Description

Table 3. Function table RGB

H = HIGH voltage level; L = LOW voltage level; X = Don’t care.

Input Switch

EN SEL

H L R0 to R1; G0 to G1; B0 to B1

H H R0 to R2; G0 to G2; B0 to B2

L X switches Rn, Gn, Bn off

Table 4. Function table HV

H = HIGH voltage level; L = LOW voltage level; X = Don’t care.

Input Switch

EN SEL

H L H1 = H0; V1 = V0; H2, V2 = L

H H H2 = H0; V2 = V0; H1, V1 = L

LXL