Datasheet

NX3L2T66 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 7 — 8 February 2013 10 of 21
NXP Semiconductors
NX3L2T66
Dual low-ohmic single-pole single-throw analog switch
12.1 Waveform and test circuits
Measurement points are given in Table 10.
Logic level: V
OH
is the typical output voltage level that occurs with the output load.
Fig 16. Enable and disable times
001aah376
nY output
OFF to HIGH
HIGH to OFF
nE input
V
I
V
OH
GND
GND
V
M
t
en
t
dis
V
X
V
X
switch
enabled
switch
disabled
switch
disabled
Table 10. Measurement points
Supply voltage Input Output
V
CC
V
M
V
X
1.4 V to 4.3 V 0.5V
CC
0.9V
OH
Test data is given in Table 11.
Definitions test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
V
EXT
= External voltage for measuring switching times.
Fig 17. Test circuit for measuring switching times
001aaj224
nE
nY/nZ nZ/nY
R
L
C
L
V
CC
V
EXT
= 1.5 V
V
I
V
V
O
G
Table 11. Test data
Supply voltage Input Load
V
CC
V
I
t
r
, t
f
C
L
R
L
1.4 V to 4.3 V V
CC
 2.5ns 35pF 50