Datasheet

NX3DV42 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 13 February 2013 10 of 19
NXP Semiconductors
NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog switch
12.2 Additional dynamic characteristics
[1] f
i
is biased at 0.5V
CC
.
[2] Typical values are measured at T
amb
= 25 C and V
CC
= 3.3 V.
Test circuit also applies for D+, HSD1+ and HSD2+.
Test data is given in Table 11
.
Definitions test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
V
EXT
= External voltage for measuring switching times.
V
I
may be connected to S or OE.
Fig 13. Test circuit for measuring switching times
aaa-001363
R
L
S
GND
OE
D-
V
CC
V
I
V
IL
C
L
G
V
EXT
= 0.8 V
HSD1-
HSD2-
Table 11. Test data
Supply voltage Input Load
V
CC
V
I
t
r
, t
f
C
L
R
L
3.0 V to 3.6 V V
CC
 2.5 ns 5 pF 50 
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); V
I
= GND or V
CC
(unless otherwise
specified); t
r
= t
f
< 2.5 ns.
Symbol Parameter Conditions T
amb
= 25 C Unit
Min Typ
[2]
Max
f
(3dB)
3 dB frequency
response
R
L
=50; see Figure 14
[1]
C
L
= 0 pF; V
CC
= 3.0 V to 3.6 V - 950 - MHz
C
L
= 5 pF; V
CC
= 3.0 V to 3.6 V - 450 - MHz

iso
isolation (OFF-state) f
i
= 240 MHz; R
L
=50; see Figure 15
[1]
V
CC
= 3.0 V to 3.6 V - 30 - dB
Xtalk crosstalk between switches;
f
i
= 240 MHz; R
L
=50;seeFigure 16
[1]
V
CC
= 3.0 V to 3.6 V - 30 - dB