Information

Features
MPC8308 Product Brief PowerQUICC
™
II Pro Processor, Rev. 0
Freescale Semiconductor 11
• Three protocol engines available on a per chip select basis:
— General-purpose chip select machine (GPCM)
— NAND flash control machine (FCM)
— Three user programmable machines (UPMs)
• Default boot ROM chip select with configurable bus width (8 or 16 bits)
2.3.8 Integrated Programmable Interrupt Controller (IPIC)
The IPIC implements the necessary functions to provide a flexible solution for general-purpose interrupt
control. The IPIC programming model is compatible with the MPC8260 interrupt controller and supports
external and internal discrete interrupt sources. Interrupts can also be redirected to an external interrupt
controller.
2.3.9 DMA Controller
The DMA is a highly-programmable data transfer engine, which is optimized to minimize the required
intervention from the host processor. It is intended for use in applications where the data size to be
transferred is statically known, and is not defined within the data packet itself. The DMA hardware
supports the following:
• Single design with two channels (Tx and Rx)
• 32-byte transfer control descriptor per channel stored in local memory
• 32 bytes of data registers, used as temporary storage to support burst transfers
Throughout this section, n is used to reference the channel number. Additionally, data sizes are defined as
byte (8-bit), halfword (16-bit), word (32-bit) and doubleword (64-bit).
2.3.10 Single I
2
C, Serial Peripheral Interface (SPI), DUART, Timers
The I
2
C controller is a synchronous, multi-master bus that can be connected to additional devices for
expansion and system development.
The serial peripheral interface (SPI) allows the MPC8308 to exchange data between other PowerQUICC
family chips, Ethernet PHYs for configuration, and peripheral devices such as EEPROMs, real-time
clocks, A/D converters, and ISDN devices.
The SPI is a full-duplex, synchronous, character-oriented channel that supports a four-wire interface
(receive, transmit, clock, and slave select). The SPI block consists of transmitter and receiver sections, an
independent baud-rate generator, and a control unit.
The DUART supports full-duplex operation and is compatible with the PC16450 and PC16550
programming models. 16-byte FIFOs are supported for both the transmitter and the receiver.
The MPC8308 system timers include the following features: periodic interrupt timer, real time clock,
software watchdog timer, and two general-purpose timer blocks.
The general purpose timers have the following features:
• Four 16-bit programmable timers