Information

Enhanced Three-Speed Ethernet Controllers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 16-83
16.5.3.6.12 Receive Broadcast Packet Counter (RBCA)
Figure 16-62 describes the definition for the RBCA register.
Table 16-66 describes the fields of the RBCA register.
16.5.3.6.13 Receive Control Frame Packet Counter (RXCF)
Figure 16-63 describes the definition for the RXCF register.
Table 16-67 describes the fields of the RXCF register.
Offset eTSEC1:0x2_46AC; eTSEC2:0x2_56AC Access: Read/Write
0910 31
R
—RBCA
W
Reset All zeros
Figure 16-62. Receive Broadcast Packet Counter Register Definition
Table 16-66. RBCA Field Descriptions
Bits Name Description
0–9 — Reserved
10–31 RBCA Receive broadcast packet counter. Increments for each broadcast frame with valid CRC and of lengths 64
to 1518 (non VLAN) or 1522 (VLAN), excluding multicast frames. Does not include range/length errors.
Offset eTSEC1:0x2_46B0; eTSEC2:0x2_56B0 Access: Read/Write
0151631
R
—RXCF
W
Reset All zeros
Figure 16-63. Receive Control Frame Packet Counter Register Definition
Table 16-67. RXCF Field Descriptions
Bits Name Description
0–15 — Reserved
16–31 RXCF Receive control frame packet counter. Increments for each MAC control frame received (PAUSE and
unsupported) with valid CRC and of lengths 64 to 1518 (non VLAN) or 1522 (VLAN).