Information

Enhanced Three-Speed Ethernet Controllers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 16-73
16.5.3.5.10 MII Management Status Register (MIIMSTAT)
The MIIMSTAT register is read only by the user. Figure 16-44 describes the definition for the MIIMSTAT
register.
O
Table 16-48 describes the fields of the MIIMSTAT register.
16.5.3.5.11 MII Management Indicator Register (MIIMIND)
The MIIMIND register is read-only by the user. Figure 16-45 describes the definition for the MIIMIND
register.
Offset eTSEC1:0x2_4530 Access: Read only
0151631
R
—
PHY Status
W
Reset All zeros
Figure 16-44. MIIMSTAT Register Definition
Table 16-48. MIIMSTAT Field Descriptions
Bits Name Description
0–15 — Reserved
16–31 PHY Status Following an MII Mgmt read cycle, the 16-bit data can be read from this location. Its default value is
0x0000.
Offset eTSEC1:0x2_4534 Access: Read only
0 28 29 30 31
R
—
Not Valid Scan Busy
W
Reset All zeros
Figure 16-45. MII Mgmt Indicator Register Definition
Table 16-49. MIIMIND Field Descriptions
Bits Name Description
0–28 — Reserved
29 Not Valid Not valid.
0 MII Mgmt read cycle has completed and the read data is valid.
1 MII Mgmt read cycle has not completed and the read data is not yet valid.
30 Scan Scan in progress.
0 A scan operation (continuous MII Mgmt read cycles) is not in progress.
1 A scan operation (continuous MII Mgmt read cycles) is in progress.
31 Busy Busy.
0 MII Mgmt block is not currently performing an MII Mgmt read or write cycle.
1 MII Mgmt block is currently performing an MII Mgmt read or write cycle.