Information

Enhanced Three-Speed Ethernet Controllers

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1

16-60 Freescale Semiconductor

16.5.3.3.10 Receive Buffer Descriptor Pointers 0–7 (RBPTR0–RBPTR7)

RBPTR0–RBPTR7 each contains the low-order 32 bits of the next receive buffer descriptor address for

their respective RxBD ring. Figure 16-32 describes the RBPTR registers. These registers takes on the

value of their ring’s associated RBASE when the RBASE register is written by software. Software must

not write RBPTRn while eTSEC is actively receiving frames. However, RBPTRn can be modified when

the receiver is disabled or when no Rx buffer is in use (after a GRACEFUL STOP RECEIVE command is

issued and the frame completes its reception) in order to change the next RxBD eTSEC receives.

Table 16-36 describes the fields of the RBPTRn register.

16.5.3.3.11 Receive Descriptor Base Address Registers (RBASE0–RBASE7)

The RBASEn registers are written by the user with the base address of each RxBD ring n. Each such value

must be divisible by eight, since the 3 least-significant bits always write as 000. Figure 16-33 describes the

RBASEn registers.

Offset eTSEC1:0x2_4384+8n; eTSEC2:0x2_5384+8n Access: Read/Write

0 28 29 31

RBPTRn —

Reset All zeros

Figure 16-32. RBPTR0–RBPTR7 Register Definition

Table 16-36. RBPTRn Field Descriptions

Bits Name Description

0–28 RBPTRn Current RxBD pointer for RxBD ring n. Points to the current BD being processed or to the next BD the

receiver uses when it is idling. After reset or when the end of the RxBD ring is reached,

eTSEC initializes RBPTRn to the value in the corresponding RBASEn. The RBPTR register is internally

written by the eTSEC’s DMA controller during reception. The pointer increments by 8 (bytes) each time a

descriptor is closed successfully by the eTSEC. Note that the 3 least-significant bits of this register are

read only and zero.

29–31 — Reserved

Offset eTSEC1:0x2_4404+8n; eTSEC2:0x2_5404+8n Access: Read/Write

0 28 29 31

RBASEn —

Reset All zeros

Figure 16-33. RBASE Register Definition