Information

Enhanced Three-Speed Ethernet Controllers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 16-57
0010 0–7 ARB User-defined arbitrary bit field property: byte 0 extracted. Defaults to 0x00.
8–15 User-defined arbitrary bit field property: byte 1 extracted. Defaults to 0x00.
16–23 User-defined arbitrary bit field property: byte 2 extracted. Defaults to 0x00.
24–31 User-defined arbitrary bit field property: byte 3 extracted. Defaults to 0x00.
0011 0–7 Reserved, should be written with zero.
8–31 DAH Destination MAC address, most significant 24 bits. Defaults to 0x000000.
0100 0–7 Reserved, should be written with zero.
8–31 DAL Destination MAC address, least significant 24 bits. Defaults to 0x000000.
0101 0–7 Reserved, should be written with zero.
8–31 SAH Source MAC address, most significant 24 bits. Defaults to 0x000000.
0110 0–7 Reserved, should be written with zero.
8–31 SAL Source MAC address, least significant 24 bits. Defaults to 0x000000.
Table 16-34. RQFPR Field Descriptions (continued)
PID
1
Bit Name Description