Information
Enhanced Three-Speed Ethernet Controllers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 16-43
TR03WT has no effect. A description of how queue weights affect eTSEC’s round-robin algorithm
appears in Section 16.6.4.3.2, “Modified Weighted Round-Robin Queuing (MWRR).” Figure 16-16
describes the TR03WT register.
Table 16-21 describes the fields of the TR03WT register.
16.5.3.2.7 TxBD Ring 4–7 Weighting Register (TR47WT)
When modified weighted round-robin Tx scheduling is enabled (TCTRL[TXSCHED] = 10), this register
determines the weighting applied to each enabled transmit queue for queues 4 to 7. For priority-based
scheduling, TR47WT has no effect. A description of how queue weights affect eTSEC’s modified
weighted round-robin algorithm appears in Section 16.6.4.3.2, “Modified Weighted Round-Robin
Queuing (MWRR).” Figure 16-17 describes the definition for the TR47WT register.
Offset eTSEC1:0x2_4140; eTSEC2:0x2_5140 Access: Read/Write
0 7 8 1516 2324 31
R
WT0 WT1 WT2 WT3
W
Reset All zeros
Figure 16-16. TR03WT Register Definition
Table 16-21. TR03WT Field Descriptions
Bits Name Description
0–7 WT0 Weighting value for TxBD ring 0 when TCTRL[TXSCHED] = 10. On each round of the Tx scheduler, a minimum
of WT0 64 bytes of data are scheduled for transmission from TxBD ring 0. Clearing this field prevents
transmission.
8–15 WT1 Weighting value for TxBD ring 1 when TCTRL[TXSCHED] = 10. On each round of the Tx scheduler, a minimum
of WT1 64 bytes of data are scheduled for transmission from TxBD ring 1. Clearing this field prevents
transmission.
16–23 WT2 Weighting value for TxBD ring 2 when TCTRL[TXSCHED] = 10. On each round of the Tx scheduler, a minimum
of WT2 64 bytes of data are scheduled for transmission from TxBD ring 2. Clearing this field prevents
transmission.
24–31 WT3 Weighting value for TxBD ring 3 when TCTRL[TXSCHED] = 10. On each round of the Tx scheduler, a minimum
of WT3 64 bytes of data are scheduled for transmission from TxBD ring 3. Clearing this field prevents
transmission.
Offset eTSEC1:0x2_4144; eTSEC2:0x2_5144 Access: Read/Write
0 7 8 1516 2324 31
R
WT4 WT5 WT6 WT7
W
Reset All zeros
Figure 16-17. TR47WT Register Definition