Information

Signal Descriptions
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 2-9
XCOREVDD[0:2] SerDes
transceiver core
supply
PCI Express
PHY
3 PWR — — —
XCOREVSS[0:2] SerDes
transceiver core
ground
PCI Express
PHY
3 GND — — —
XPADVDD[0:1] SerDes
transceiver pad
supply
PCI Express
PHY
2 PWR — — —
XPADVSS[0:1] SerDes
transceiver pad
ground
PCI Express
PHY
2 GND — — —
SDAVDD Analog supply
for SerDes PLL
PCI Express
PHY
1 PWR — — —
SD_PLL_TPA_ANA Analog test
point for
SerDes PLL
testing
PCI Express
PHY
1 O — — —
SDAVSS Analog ground
for SerDes PLL
PCI Express
PHY
1 GND — — —
LB_POR_CFG_
BOOT_ECC
Enable/Disable
ECC for Flash
during RCW
load
eLBC 1 I — TSEC1_TX_ER 16-2/16-7
LBC_PM_REF_10 Status of
uncorrectable
ECC error in
FCM during
boot loading
from Flash
eLBC 1 O — TSEC1_TX_EN 16-2/16-7
LD[0:15] LBC data eLBC 16 I/O 10-2/10-5 — —
LA[0:25] LBC port
address
eLBC 26 O 10-2/10-5 — —
LCS[0:3] LBC chip select
0–3
eLBC 4 O 10-2/10-5 — —
LWE0, LFWE0, LBS0 LBC write
enable, Byte
(lane) select
eLBC 1 O 10-2/10-5 — —
LWE1, LBS1 LBC write
enable, Byte
(lane) select
eLBC 1 O 10-2/10-5 — —
LBCTL LBC data buffer
control
eLBC 1 O 10-2/10-5 — —
Table 2-1. MPC8308 Signal Reference by Functional Block (continued)
Name Description
Functional
Block
No. of
Signals
I/O
Table/
Page
Alternate
Function(s)
Table/
Page