Information

PCI Express Interface Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
14-126 Freescale Semiconductor
5. The local host can read the message content from the PCI Express inbound mailbox data register
(PEX_IMBDR).
6. The local host should clear PEX_IMBCR[READY] and all the interrupt event and status bits in the
relevant registers.
7. The RC can repeat steps 3–4 after verifying that the PEX_IMBCR[READY] is cleared.
14.6.4 Power Management
All device power states are supported except D3cold. In addition, all link power states are supported except
the L2 and L3 states. Only L0s ASPM (active state power management) mode is supported if enabled by
configuring the link control register bits 1–0 in configuration space. Note that there is no power saving in
the controller when the device is put into a non-D0 state. The only power saving is the I/O drivers when
the controller is put into a non-L0 link state.
14.6.4.1 L2/L3 Ready Link State
The L2/L3 Ready link state is entered after the EP device is put into a D3hot state followed by a
PME_Turn_Off/PME_TO_Ack message handshake protocol. Exiting this state requires a POR or a
detection of a beacon or a WAKE# signal from the EP device. The PCI Express controller as an EP device
does not support the generation of beacon, so the device can alternatively use one of the GPIO signals as
an enable to an external tristate buffer to generate the WAKE# signal if the device needs to wake up from
an L2/L3 Ready state. As an RC device, the WAKE# signal from the EP device can be connected to one
of the external interrupt input pins to service the WAKE# request if needed.
Table 14-142. Power Management State Supported
Component
D-State
Permissible
Interconnect State
Action
D0 L0, L0s In full operation.
D1 L1 All outbound traffic is stopped. All inbound traffic is thrown away. The only exceptions are
PME messages and configuration transactions. If the device is in RC mode, a
PM_Turn_Off message can be sent through the PCI Express power management control
register.
D2 L1 All outbound traffic is stopped. All inbound traffic is thrown away. The only exceptions are
PME messages and configuration transactions. If the device is in RC mode, a
PM_Turn_Off message can be sent through the PCI Express power management control
register.
D3hot L1, L2/L3 ready All outbound traffic is stopped. All inbound traffic is thrown away. The only exceptions are
PME messages and configuration transactions. If the device is in RC mode, a
PM_Turn_Off message can be sent through the PCI Express power management control
register. Note that if a transition of D3 D0 occurs, a reset is performed to the controller
configuration space. In addition, link training restarts.
D3cold Not supported Not supported.