Information

PCI Express Interface Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 14-115
14.6.1.3 Byte Swapping
Byte swapping is executed when either an inbound transaction (that is, a write or response) to the CSB or
an outbound transaction with data (that is, a write) to PCI Express is performed.
14.6.1.4 Outbound Byte Swapping
Byte swapping is executed when an outbound transaction with data (that is, a write) to PCI Express is
performed. Figure 14-140 shows the outbound data swapping.
Figure 14-140. Outbound Byte Swapping
14.6.1.5 Inbound Byte Swapping
Byte swapping is executed when an inbound transaction with data (that is, a write or response) to the CSB
is performed.
14.6.1.6 Transaction Ordering Rule
In general, transactions are serviced in the order that they were received. However, transactions can be
reordered as they are sent due to stalled conditions such as the internal buffer full condition. Below are the
ordering rules for sending the next outstanding request.
A posted request can and will bypass all other transactions except another posted request.
Completion can and will bypass non-posted and posted requests only if the relaxed ordering (RO)
bit of the PCI Express packet’s header is set.
A non-posted request cannot bypass a posted or non-posted request but can bypass completion if
the relaxed ordering bit is set.
CplD Yes Yes Completion with Data
CplLk No No Completion for Locked Memory Read without Data
CplDLk No No Completion for Locked Memory Read with Data
Table 14-137. PCI Express Transactions (continued)
PCI Express
Transaction
MPC8378E/MPC8377E
Support as an Initiator
MPC8378E/MPC8377E
Support as a Target
Definition
CSB
MSB LSB
Byte0 Byte1 Byte2 Byte3
PCI Express
Byte4 Byte5 Byte6 Byte7
Byte7 Byte6 Byte5 Byte4 Byte3 Byte2 Byte1 Byte0