Information

PCI Express Interface Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 14-49
14.4.4.20 PCI Express MSI Message Capability ID Register (EP Mode Only)
The PCI Express MSI message capability ID register is shown in Figure 14-60.
Table 14-58 describes the PCI Express capability ID register fields.
NOTE
The value of the Next Pointer register at offset 0x071 is 0x00 (NULL), as
this is the last capability of the list.
14.4.4.21 PCI Express MSI Message Control Register (EP Mode Only)
The PCI Express MSI message control register is shown in Figure 14-61.
16 PMES PME status.
15–0 PME Requestor ID PME requestor ID.
Offset 0x070 Access: Read-only
7 0
R MSI Message Capability ID
W
Reset00000101
Figure 14-60. PCI Express Capability ID Register
Table 14-58. PCI Express Capability ID Register Fields Description
Bits Name Description
7–0 MSI Message
Capability ID
MSI Message = 0x05
Offset 0x072 Access: Mixed
15 8764310
R
—
64AC
MME
MMC
MSIE
W
Reset0000000010001000
Figure 14-61. PCI Express MSI Message Control Register
Table 14-57. PCI Express Root Status Register Fields Description (continued)
Bits Name Description