Information

PCI Express Interface Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 14-37
14.4.4.1 PCI Express Power Management Capability ID Register
The PCI Express power management capability ID register is shown in Figure 14-41.
Table 14-39 describes the PCI Express power management capability ID fields.
14.4.4.2 PCI Express Power Management Next Capabilities Pointer Register
The PCI Express power management next capabilities pointer register is shown in Figure 14-42.
Table 14-40 describes the PCI Express power management next capabilities pointer fields.
Offset 0x044 Access: Read-only
7 0
R Power Mgmt Capability ID
W
Reset00000001
Figure 14-41. PCI Express Power Management Capability ID Register
Table 14-39. PCI Express Power Management Capability ID Register Fields Description
Bits Name Description
7–0 Power Management
Capability ID
Power Management = 0x01
Offset 0x045 Access: Read-only
7 0
R
W
Reset01001100
Figure 14-42. PCI Express Power Management Next Capabilities Pointer
Table 14-40. PCI Express Power Management Next Capabilities Pointer Fields Description
Bits Name Description
7–0 — Points to the PCI Express Capability Registers