Information

PCI Express Interface Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
14-26 Freescale Semiconductor
14.4.2.6 PCI Express Minimum Grant Register (EP Mode Only)
This register does not apply to PCI Express. It is present for legacy purposes.
14.4.2.7 PCI Express Maximum Latency Register (EP Mode Only)
This register does not apply to PCI Express. It is present for legacy purposes.
Offset 0x03E (EP mode only) Access: Read-only
7 0
RMIN_GNT
W
Reset All zeros
Figure 14-20. PCI Express Minimum Grant Register (MAX_GNT)
Table 14-20. PCI Express MInimum Grant Register Fields Description
Bits Name Description
7–0 MIN_GNT Does not apply for PCI Express.
Offset 0x03F (EP mode only) Access: Read-only
7 0
R MAX_LAT
W
Reset All zeros
Figure 14-21. PCI Express Maximum Latency Register (MAX_LAT)
Table 14-21. PCI Express Maximum Latency Register Fields Description
Bits Name Description
7–0 MAX_LAT Does not apply for PCI Express.