Information

PCI Express Interface Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
14-24 Freescale Semiconductor
14.4.2.2 PCI Express Subsystem Vendor ID Register (EP Mode Only)
The PCI Express subsystem vendor ID register, shown in Figure 14-16, identifies the subsystem.
Table 14-16 describes the PCI Express subsystem vendor ID register.
14.4.2.3 PCI Express Subsystem ID Register (EP Mode Only)
The PCI Express subsystem ID register, shown in Figure 14-17, identifies the subsystem.
Table 14-17 describes the PCI Express subsystem ID register.
Offset 0x02C (EP mode only) Access: Read-only
15 0
R Subsystem Vendor ID
W
Reset All zeros
Figure 14-16. PCI Express Subsystem Vendor ID Register
Table 14-16. PCI Express Subsystem Vendor ID Register Fields Description
Bits Name Description
15–0 Subsystem
Vendor ID
Subsystem Vendor ID. The value of this register can be set by programming the SSVID field of the PCI
Express Subsystem Vendor ID Update Register (PEX_SSVID_UPDATE). See Section 14.4.6.8, “PCI
Express Subsystem Vendor ID Update Register (PEX_SSVID_UPDATE).”
This value has to be programmed before setting the config-ready bit in the PCI Express Configuration
Ready Register so that the host reads the correct information during enumeration.
Offset 0x02E (EP mode only) Access: Read-only
15 0
R Subsystem ID
W
Reset All zeros
Figure 14-17. PCI Express Subsystem ID Register
Table 14-17. PCI Express Subsystem ID Register Fields Description
Bits Name Description
15–0 Subsystem ID Subsystem ID. The value of this register can be set by programming the SSID field of the PCI Express
Subsystem Vendor ID Update Register (PEX_SSVID_UPDATE). See Section 14.4.6.8, “PCI Express
Subsystem Vendor ID Update Register (PEX_SSVID_UPDATE).
This value has to be programmed before setting the config-ready bit in the PCI Express Configuration
Ready Register so that the host reads the correct information during enumeration.