Information
PCI Express Interface Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 14-13
0xDE4 PCI Express EP Inbound Window Translation Address Register
1 (PEX_EPIWTAR1)
R/W 0x0000_0000 14.5.11.1/14-108
0xDE8 PCI Express EP Inbound Window Translation Address Register
2 (PEX_EPIWTAR2)
R/W 0x0000_0000 14.5.11.1/14-108
0xDEC PCI Express EP Inbound Window Translation Address Register
3 (PEX_EPIWTAR3)
R/W 0x0000_0000 14.5.11.1/14-108
PCI Express RC Inbound Address Mapping Registers
0xE60 PCI Express RC Inbound Window Attributes Register 0
(PEX_RCIWAR0)
R/W 0x0000_0000 14.5.12.1/14-109
0xE64 PCI Express RC Inbound Window Translation Address Register
0 (PEX_RCIWTAR0)
R/W 0x0000_0000 14.5.12.2/14-110
0xE68 PCI Express RC Inbound Window Base Address Register Low 0
(PEX_RCIWBARL0)
R/W 0x0000_0000 14.5.12.3/14-110
0xE6C PCI Express RC Inbound Window Base Address Register High
0 (PEX_RCIWBARH0)
R/W 0x0000_0000 14.5.12.4/14-111
0xE70 PCI Express RC Inbound Window Attributes Register 1
(PEX_RCIWAR1)
R/W 0x0000_0000 14.5.12.1/14-109
0xE74 PCI Express RC Inbound Window Translation Address Register
1 (PEX_RCIWTAR1)
R/W 0x0000_0000 14.5.12.2/14-110
0xE78 PCI Express RC Inbound Window Base Address Register Low 1
(PEX_RCIWBARL1)
R/W 0x0000_0000 14.5.12.3/14-110
0xE7C PCI Express RC Inbound Window Base Address Register High
1 (PEX_RCIWBARH1)
R/W 0x0000_0000 14.5.12.4/14-111
0xE80 PCI Express RC Inbound Window Attributes Register 2
(PEX_RCIWAR2)
R/W 0x0000_0000 14.5.12.1/14-109
0xE84 PCI Express RC Inbound Window Translation Address Register
2 (PEX_RCIWTAR2)
R/W 0x0000_0000 14.5.12.2/14-110
0xE88 PCI Express RC Inbound Window Base Address Register Low 2
(PEX_RCIWBARL2)
R/W 0x0000_0000 14.5.12.3/14-110
0xE8C PCI Express RC Inbound Window Base Address Register High
2 (PEX_RCIWBARH2)
R/W 0x0000_0000 14.5.12.4/14-111
0xE90 PCI Express RC Inbound Window Attributes Register 3
(PEX_RCIWAR3)
R/W 0x0000_0000 14.5.12.1/14-109
0xE94 PCI Express RC Inbound Window Translation Address Register
3 (PEX_RCIWTAR3)
R/W 0x0000_0000 14.5.12.2/14-110
0xE98 PCI Express RC Inbound Window Base Address Register Low 3
(PEX_RCIWBARL3)
R/W 0x0000_0000 14.5.12.3/14-110
0xE9C PCI Express RC Inbound Window Base Address Register High
3 (PEX_RCIWBARH3)
R/W 0x0000_0000 14.5.12.4/14-111
Table 14-3. PCI Express Memory Map (continued)
Offset Register Access Reset Section/Page
PCI Express—Block Base Address 0x0_9000