Information
PCI Express Interface Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
14-12 Freescale Semiconductor
0xBFC CSB System Miscellaneous Interrupt Status Register
(PEX_CSMISR)
w1c 0x0000_0000 14.5.8.8/14-101
Power Management Registers
0xC80 PCI Express PM Control Register (PEX_PM_CTRL) R/W 0x0000_0000 14.5.9.1/14-103
PCI Express Outbound Address Mapping Registers
0xCA0 PCI Express Outbound Window Attributes Register 0
(PEX_OWAR0)
R/W 0x0000_0000 14.5.10.1/14-104
0xCA4 PCI Express Outbound Window Base Address Register 0
(PEX_OWBAR0)
R/W 0x0000_0000 14.5.10.2/14-105
0xCA8 PCI Express Outbound Window Translation Address Register
Low 0 (PEX_OWTARL0)
R/W 0x0000_0000 14.5.10.3/14-106
0xCAC PCI Express Outbound Window Translation Address Register
High 0 (PEX_OWTARH0)
R/W 0x0000_0000 14.5.10.4/14-106
0xCB0 PCI Express Outbound Window Attributes Register 1
(PEX_OWAR1)
R/W 0x0000_0000 14.5.10.1/14-104
0xCB4 PCI Express Outbound Window Base Address Register 1
(PEX_OWBAR1)
R/W 0x0000_0000 14.5.10.2/14-105
0xCB8 PCI Express Outbound Window Translation Address Register
Low 1 (PEX_OWTARL1)
R/W 0x0000_0000 14.5.10.3/14-106
0xCBC PCI Express Outbound Window Translation Address Register
High 1 (PEX_OWTARH1)
R/W 0x0000_0000 14.5.10.4/14-106
0xCC0 PCI Express Outbound Window Attributes Register 2
(PEX_OWAR2)
R/W 0x0000_0000 14.5.10.1/14-104
0xCC4 PCI Express Outbound Window Base Address Register 2
(PEX_OWBAR2)
R/W 0x0000_0000 14.5.10.2/14-105
0xCC8 PCI Express Outbound Window Translation Address Register
Low 2 (PEX_OWTARL2)
R/W 0x0000_0000 14.5.10.3/14-106
0xCCC PCI Express Outbound Window Translation Address Register
High 2 (PEX_OWTARH2)
R/W 0x0000_0000 14.5.10.4/14-106
0xCD0 PCI Express Outbound Window Attributes Register 3
(PEX_OWAR3)
R/W 0x0000_0000 14.5.10.1/14-104
0xCD4 PCI Express Outbound Window Base Address Register 3
(PEX_OWBAR3)
R/W 0x0000_0000 14.5.10.2/14-105
0xCD8 PCI Express Outbound Window Translation Address Register
Low 3 (PEX_OWTARL3)
R/W 0x0000_0000 14.5.10.3/14-106
0xCDC PCI Express Outbound Window Translation Address Register
High 3 (PEX_OWTARH3)
R/W 0x0000_0000 14.5.10.4/14-106
PCI Express EP Inbound Address Translation Registers
0xDE0 PCI Express EP Inbound Window Translation Address Register
0 (PEX_EPIWTAR0)
R/W 0x0000_0000 14.5.11.1/14-108
Table 14-3. PCI Express Memory Map (continued)
Offset Register Access Reset Section/Page
PCI Express—Block Base Address 0x0_9000