Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 13-137
Note as part of the architecture, the FIFO for the receive endpoints is not partitioned into multiple channels
like the transmit FIFO. Thus, the size of the RX FIFO does not scale with the number of endpoints.
13.8.3.4 Interrupt/Bulk Endpoint Operational Model
The behaviors of the device controller for interrupt and bulk endpoints are identical. All valid IN and OUT
transactions to bulk pipes will handshake with a NAK unless the endpoint had been primed. Once the
endpoint has been primed, data delivery will commence.
A dTD is retired by the device controller when the packets described in the transfer descriptor have been
completed. Each dTD describes N packets to be transferred according to the USB Variable Length transfer
protocol. The formula, Table 13-86, and Table 13-87 describe how the device controller computes the
number and length of the packets to be sent/received by the USB vary according to the total number of
bytes and maximum packet length.
With Zero Length Termination (ZLT) = 0
N = INT(number of bytes/max. packet length) + 1
With Zero Length Termination (ZLT) = 1
N = MAXINT(number of bytes/max. packet length)
NOTE
The MULT field in the dQH must be set to ‘00’ for bulk, interrupt, and
control endpoints.
TX-dTD is complete when:
• All packets described dTD were successfully transmitted. *** Total bytes in dTD will equal zero
when this occurs.
Table 13-86. Variable Length Transfer Protocol Example (ZLT = 0)
Bytes
(dTD)
Max. Packet
Length
(dQH)
N P1P2P3
511 256 2 256 255 —
512 256 3 256 256 0
512 512 2 512 0 —
Table 13-87. Variable Length Transfer Protocol Example (ZLT = 1)
Bytes
(dTD)
Max. Packet
Length
(dQH)
N P1P2P3
511 256 2 256 255 —
512 256 2 256 256 —
512 512 1 512 — —