Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 13-129
13.8 Device Operational Model
The function of the device operation is to transfer a request in the memory image to and from the Universal
Serial Bus. Using a set of linked list transfer descriptors, pointed to by a queue head, the device controller
will perform the data transfers. The following sections explain the use of the device controller from the
device controller driver (DCD) point-of-view and further describe how specific USB bus events relate to
status changes in the device controller programmer's interface.
13.8.1 Device Controller Initialization
After hardware reset, the USB DR module is disabled until the run/stop bit (USBCMD[RS]) is set to a '1'.
In the disabled state, the pull-up on the USB D+ is not active which prevents an attach event from
occurring. At a minimum, it is necessary to have the queue heads setup for endpoint zero before the device
attach occurs. Shortly after the device is enabled, a USB reset will occur followed by setup packet arriving
at endpoint 0. A queue head must be prepared so that the device controller can store the incoming setup
packet.
To configure the external ULPI PHY the following initialization sequence is required.
1. After power-on reset the UTMI PHY will be in disabled state and the PLL will be held reset. The
UTMI PHY should remain disabled if the ULPI is being used.
2. Set the CONTROL[PHY_CLK_SEL] bits to select the ULPI PHY as the source of USB controller
PHY clock.
3. Wait for PHY clock to become valid. This can be determined by polling the
CONTROL[PHY_CLK_VALID] status bit. Note that this bit is not valid once the
CONTROL[USB_EN] bit is set.
Once the PHY clock is valid the user can proceed to the device controller initialization phase.
In order to initialize a device, the software should perform the following steps:
1. Set the controller mode to device mode. Optionally set USBMODE[SDIS] (streaming disable).
Table 13-81. Buffer Pointer Page 1
Bits Description
31–12 Buffer Pointer. Selects the page offset in memory for the packet buffer. Non virtual memory systems will typically set
the buffer pointers to a series of incrementing integers.
11 Reserved
10–0 Frame Number. Written by the device controller to indicate the frame number in which a packet finishes. This is typically
be used to correlate relative completion times of packets on an ISO endpoint.
Table 13-82. Buffer Pointer Pages 2–4
Bits Description
31–12 Buffer Pointer. Selects the page offset in memory for the packet buffer. Non virtual memory systems will typically set
the buffer pointers to a series of incrementing integers.
11–0 Reserved