Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 13-123
13.6.14.2.4 Host System Error
The host controller is a bus master and any interaction between the host controller and the system may
experience errors. The type of host error may be catastrophic to the host controller making it impossible
for the host controller to continue in a coherent fashion. Behavior for these types of errors is to halt the
host controller. Host-based error must result in the following actions:
• USBCMD[RS] is cleared.
• USBSTS[SEI] and USBSTS[HCH] register are set
• If the host system error enable bit, USBINTR[SEE] is set, the host controller issues a hardware
interrupt. This interrupt is not delayed to the next interrupt threshold.
Table 13-74 summarizes the required actions taken on the various host errors.
NOTE
After a host system error, software must reset the host controller using
USBCMD[RST] before re-initializing and restarting the host controller.
13.7 Device Data Structures
This section defines the interface data structures used to communicate control, status, and data between
device controller driver (DCD) software and the device controller. The data structure definitions in this
chapter support a 32-bit memory buffer address space. The interface consists of device queue heads and
transfer descriptors.
NOTE
Software must ensure that no interface data structure reachable by the
device controller spans a 4K-page boundary.
The data structures defined in the section are (from the device controller's perspective) a mix of read-only
and read/writable fields. The device controller must preserve the read-only fields on all data structure
writes.
Table 13-74. Summary Behavior on Host System Errors
Cycle Type Master Abort Target Abort
Data Phase
Parity
Frame list pointer fetch (read) Fatal Fatal Fatal
siTD fetch (read) Fatal Fatal Fatal
siTD status write-back (write) Fatal Fatal Fatal
iTD fetch (read) Fatal Fatal Fatal
iTD status write-back (write) Fatal Fatal Fatal
qTD fetch (read) Fatal Fatal Fatal
qHD status write-back (write) Fatal Fatal Fatal
Data write Fatal Fatal Fatal
Data read Fatal Fatal Fatal