Information

Overview
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
1-6 Freescale Semiconductor
— Supports block sizes of 1 ~ 4096 bytes
— Supports the write protection switch for write operations
— Supports synchronous abort
— Supports pause during the data transfer at block gap
— Supports SDIO read wait and suspend resume operations
— Supports Auto CMD12 for multi-block transfer
— Host can initiate non-data transfer command while data transfer is in progress
— Allows cards to interrupt the host in 1 and 4-bit SDIO modes
— Embodies a fully configurable 128  32-bit FIFO for read/write data
— Supports DMA capabilities
• Universal serial bus (USB) dual-role controller
— Designed to comply with Universal Serial Bus Revision 2.0 Specification
— Supports operation as a stand-alone USB host controller
– Supports USB root hub with one downstream-facing port
– Enhanced host controller interface (EHCI) compatible
— Supports operation as a stand-alone USB device
– Supports one upstream-facing port
– Supports three programmable bidirectional USB endpoints
— Supports high-speed (480-Mbps), full-speed (12-Mbps), and low-speed (1.5-Mbps) operations.
Low speed is only supported in host mode.
— Host mode direct connect of full- and low-speed devices
— Supports USB on-the-go mode when using an external ULPI PHY, which includes both device
and host functionality
— Host and device support
• Real time clock (RTC) module
— 32-bit RTC counter, which:
– Increments for every one second
– Can be initialized by software to a specific initial count value
— An alarm function with programmable and maskable alarm interrupt
— Programmable and maskable every second interrupt
— Two possible clock sources:
– External RTC clock (RTC_PIT_CLOCK)
– CSB bus clock
— RTC function can be disabled, if required