Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 13-117
is met the host controller immediately executes a start-split transaction and appropriately advances the
transaction state of siTD
X
, then follows siTD
X
[Next Pointer] to the next schedule item. If the criterion is
not met, the host controller simply follows siTD
X
[Next Pointer] to the next schedule item. Note that in the
case of a 2b boundary case, the split-transaction of siTD
X-1
will have its Active bit cleared when the host
controller returns to the context of siTD
X
. Also, note that software should not initialize an siTD with
C-mask bits 0 and 1 set and an S-mask with bit 0 set. This scheduling combination is not supported and
the behavior of the host controller is undefined.
13.6.12.3.7 Split Transaction for Isochronous—Processing Example
There is an important difference between how the hardware/software manages the isochronous split
transaction state machine and how it manages the asynchronous and interrupt split transaction state
machines. The asynchronous and interrupt split transaction state machines are encapsulated within a single
queue head. The progress of the data stream depends on the progress of each split transaction. In some
respects, the split-transaction state machine is sequenced using the Execute Transaction queue head
traversal state machine.
Isochronous is a pure time-oriented transaction/data stream. The interface data structures are optimized to
efficiently describe transactions that need to occur at specific times. The isochronous split-transaction state
machine must be managed across these time-oriented data structures. This means that system software
must correctly describe the scheduling of split-transactions across more than one data structure.
Then the host controller must make the appropriate state transitions at the appropriate times, in the correct
data structures.
For example, Table 13-72 illustrates a few frames worth of scheduling required to schedule a case 2a
full-speed isochronous data stream.
This example shows the first three siTDs for the transaction stream. Since this is the case-2a frame-wrap
case, S-masks of all siTDs for this endpoint have a value of 0x10 (a one bit in microframe 4) and C-mask
value of 0xC3 (one-bits in microframes 0,1, 6 and 7). Additionally, software ensures that the Back Pointer
field of each siTD references the appropriate siTD data structure (and the Back Pointer T-bits are cleared).
Table 13-72. Example Case 2a—Software Scheduling siTDs for an IN Endpoint
siTDX Micro-Frames InitialSplitXState
#Masks01234567
X S-Mask 1 Do Start Split
C-Mask 11 11
X+1 S-Mask 1 Do Complete Split
C-Mask 11 11
X+2 S-Mask 1 Do Complete Split
C-Mask 11 11
X+3 S-Mask Repeats previous pattern Do Complete Split
C-Mask