Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
13-116 Freescale Semiconductor
13.6.12.3.6 Complete-Split for Scheduling Boundary Cases 2a, 2b
Boundary cases 2a and 2b (INs only) (see Figure 13-57) require that the host controller use the transaction
state context of the previous siTD to finish the split transaction. Table 13-71 enumerates the transaction
state fields.
NOTE
TP and T-count are used only for Host to Device (OUT) endpoints.
If software has budgeted the schedule of this data stream with a frame wrap case, then it must initialize the
siTD[Back Pointer] field to reference a valid siTD and have the T bit in the siTD[Back Pointer] field
cleared. Otherwise, software must set the T bit in siTD[Back Pointer]. The host controller's rules for
interpreting when to use the siTD[Back Pointer] field are listed below. These rules apply only when the
siTD's Active bit is a one and the SplitXState is Do Complete Split.
• When cMicroFrameBit is a 0x1 and the siTD
X
[Back Pointer] T-bit is zero, or
• If cMicroFrameBit is a 0x2 and siTDX[S-mask[0]] is zero
When either of these conditions apply, then the host controller must use the transaction state from siTD
X-1
.
In order to access siTD
X-1
, the host controller reads on-chip the siTD referenced from siTD
X
[Back
Pointer].
The host controller must save the entire state from siTD
X
while processing siTD
X-1
. This is to
accommodate for case 2b processing. The host controller must not recursively walk the list of siTD[Back
Pointers].
If siTD
X-1
is active (Active bit is set and SplitXStat is Do Complete Split), then both Test A and Test B are
applied as described above. If these criteria to execute a complete-split are met, the host controller executes
the complete split and evaluates the results as described above. The transaction state (see Table 13-71) of
siTD
X-1
is appropriately advanced based on the results and written back to memory. If the resultant state
of siTD
X-1
's Active bit is a one, then the host controller returns to the context of siTD
X
, and follows its
next pointer to the next schedule item. No updates to siTD
X
are necessary.
If siTD
X-1
is active (Active bit is set and SplitXStat is Do Start Split), then the host controller must clear
the Active bit and set the Missed Micro-Frame status bit and the resultant status is written back to memory.
If siTD
X-1
's Active bit is cleared, (because it was cleared when the host controller first visited siTD
X-1
via
siTD
X
's back pointer, it transitioned to zero as a result of a detected error, or the results of siTD
X-1
's
complete-split transaction cleared it), then the host controller returns to the context of siTD
X
and
transitions its SplitXState to Do Start Split. The host controller then determines whether the case 2b start
split boundary condition exists (that is, if cMicroframeBit is 1 and siTD
X
[S-mask[0]] is 1). If this criterion
Table 13-71. Summary siTD Split Transaction State
Buffer State Status Execution Progress
Total Bytes To Transfer
P (page select)
Current Offset
TP (transaction position)
T-count (transaction count)
All bits in the status field C-prog-mask