Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 13-73
Figure 13-44. General Format of Asynchronous Schedule List
The ASYNCLISTADDR register contains a physical memory pointer to the next queue head. When the
host controller makes a transition to executing the asynchronous schedule, it begins by reading the queue
head referenced by the ASYNCLISTADDR register. Software must set queue head horizontal pointer
T-bits to a zero for queue heads in the asynchronous schedule.
13.6.6 Periodic Schedule Frame Boundaries vs. Bus Frame Boundaries
The USB Specification Revision 2.0 requires that the frame boundaries (SOF frame number changes) of
the high-speed bus and the full- and low-speed bus(es) below USB 2.0 hubs be strictly aligned.
Super-imposed on this requirement is that USB 2.0 hubs manage full- and low-speed transactions via a
microframe pipeline (see start- (SS) and complete- (CS) splits illustrated in Figure 13-45). A simple, direct
projection of the frame boundary model into the host controller interface schedule architecture creates
tension (complexity for both hardware and software) between the frame boundaries and the scheduling
mechanisms required to service the full- and low-speed transaction translator periodic pipelines.
Figure 13-45. Frame Boundary Relationship Between HS Bus and FS/LS Bus
The simple projection, as Figure 13-45 illustrates, introduces frame-boundary wrap conditions for
scheduling on both the beginning and end of a frame. In order to reduce the complexity for hardware and
software, the host controller is required to implement a one microframe phase shift for its view of frame
boundaries. The phase shift eliminates the beginning of frame and frame-wrap scheduling boundary
conditions.
The implementation of this phase shift requires that the host controller use one register value for accessing
the periodic frame list and another value for the frame number value included in the SOF token. These two
USBSTS
Operational
Registers
USBCMD
AsyncListAddr
•
•
•
•
•
•
H
FS/LS Bus
HS Bus
SS
7
CSCSCSCSCSCSCSCS
076543210
Frame
Boundary
SS
Micro-Frame
Numbers
1