Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
13-68 Freescale Semiconductor
13.6 Host Operations
The general operational model for the USB DR module in host mode is defined by the EHCI specification.
The EHCI specification describes the register-level interface for a host controller for the USB Revision
2.0. It includes a description of the hardware/software interface between system software and host
controller hardware. Information concerning the initialization of the USB module is included in the
following section; however, the full details of the EHCI specification are beyond the scope of this
document.
13.6.1 Host Controller Initialization
After initial power-on or host controller reset (hardware or through USBCMD[RST]), all of the operational
registers are at their default values. After a hardware reset, only the operational registers are at their default
values.
To configure the external ULPI PHY the following initialization sequence is required:
1. The UTMI PHY should remain disabled if the ULPI is being used.
2. Set the CONTROL[PHY_CLK_SEL] bits to select the ULPI PHY as the source of USB controller
PHY clock.
3. Wait for PHY clock to become valid. This can be determined by polling the
CONTROL[PHY_CLK_VALID] status bit. Note that this bit is not valid once the
CONTROL[USB_EN] bit is set
Once the PHY clock is valid the user can proceed to the host controller initialization phase.
In order to initialize the USB DR module, software should perform the following steps
1. Set the controller mode to host mode. Optionally set USBMODE[SDIS] (streaming disable)
NOTE
Transitioning from device mode to host mode requires a host controller reset
before modifying USBMODE.
2. Optionally modify the BURSTSIZE register.
3. Program the PTS field of the PORTSC register if using a non-ULPI PHY.
4. Set CONTROL[USB_EN].
5. Write the appropriate value to the USBINTR register to enable the appropriate interrupts.
6. Write the base address of the periodic frame list to the PERIODICLIST BASE register. If there are
no work items in the periodic schedule, all elements of the periodic frame list should have their
T-Bits set.
7. Write the USBCMD register to set the desired interrupt threshold, frame list size (if applicable) and
turn the controller by setting the RS bit.
At this point, the USB DR module is up and running and the port registers begin reporting device connects.
System software can enumerate a port through the reset process (where the port is in the enabled state). At
this point, the port is active with SOFs occurring down the enabled port enabled high-speed ports, but the