Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
13-32 Freescale Semiconductor
13.3.2.16 USB Mode Register (USBMODE)—Non-EHCI
The USB mode register, shown in Figure 13-22, is not defined in the EHCI specification. This register
controls the operating mode of the module.
8 ID USB ID
1 B device
0 A device
7–5 — Reserved, should be cleared.
4 DP Data pulsing
1 The pullup on DP is asserted for data pulsing during SRP.
0 The pullup on DP is not asserted.
3 OT OTG termination. This bit must be set when the OTG device is in device mode.
1 Enable pulldown on DM
0 Disable pulldown on DM
2 — Reserved, should be cleared.
1 VC VBUS charge. Setting this bit causes the VBus line to be charged. This is used for VBus pulsing during SRP.
0 VD VBUS discharge. Setting this bit causes VBus to discharge through a resistor.
Offset 0x1A8 Access: Read/Write
31 54 3 210
R
—SDISSLOM—CM
W
Reset All zeros
Figure 13-22. USB Mode (USBMODE)
Table 13-24. OTGSC Register Field Descriptions (continued)
Bits Name Description