Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
13-30 Freescale Semiconductor
13.3.2.15 On-The-Go Status and Control (OTGSC)—Non-EHCI
This register is not defined in the EHCI specification. The USB DR module implements one On-The-Go
(OTG) status and control register corresponding to Port 0.
The OTGSC register has four sections:
• OTG interrupt enables (Read/Write)
• OTG interrupt status (Read/Write to Clear)
• OTG status inputs (Read Only)
• OTG controls (Read/Write)
The status inputs are de-bounced using a 1-msec time constant. Values on the status inputs that do not
persist for more than 1 msec will not cause an update of the status inputs, or cause and OTG interrupt.
Offset 0x1A4 Access: Mixed
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
—DPIE1msE
BSEI
E
BSVIE
ASVI
E
AVVI
E
IDIE —
DPIS 1msS
BSEIS
BSVI
S
ASVI
S
AVVI
S
IDIS
W w1c w1c w1c w1c w1c w1c w1c
Reset0010000000000000
15 14 13 12 11 10 9 8 7 5 4 3 2 1 0
R
—
DPS 1msT BSE BSV ASV AVV ID
— DP OT — VC VD
W
Reset0010110000100000
Figure 13-21. OTG Status Control (OTGSC)
Table 13-24. OTGSC Register Field Descriptions
Bits Name Description
31 — Reserved, should be cleared.
30 DPIE Data pulse interrupt enable
1 Enable
0 Disable
29 1msE 1-millisecond timer Interrupt enable
1 Enable
0 Disable
28 BSEIE B session end interrupt enable
1 Enable
0 Disable
27 BSVIE B session valid interrupt enable
1 Enable
0 Disable
26 ASVIE A session valid interrupt enable
1 Enable
0 Disable