Information
Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 13-23
13.3.2.12 ULPI Register Access (ULPI VIEWPORT)
The ULPI register access provides indirect access to the ULPI PHY register set. Although the controller
modules perform access to the ULPI PHY register set, there may be extraordinary circumstances where
software may need direct access. Be advised that writes to the ULPI through the ULPI viewport can
substantially harm standard USB operations. Currently no usage model has been defined where software
should need to execute writes directly to the ULPI. Note that executing read operations though the ULPI
viewport should have no harmful side effects to standard USB operations. Also note that if the ULPI
interface is not enabled, this register will always read zeros.
ULPI VIEWPORT is shown in Figure 13-18.
Table 13-21 describes the ULPI register access fields.
Offset 0x170 Access: Mixed
31 30 29 28 27 26 24 23 16
R
ULPIWU ULPIRUN ULPIRW —
ULPISS
ULPIPORT ULPIADDR
W
Reset All zeros
15 8 7 0
RULPIDATRD
ULPIDTWR
W
Reset All zeros
Figure 13-18. ULPI Register Access (ULPI VIEWPORT)
Table 13-21. ULPI VIEWPORT Field Descriptions
Bits Name Description
31 ULPIWU ULPI Wake Up. Writing 1 to this bit begins the wakeup operation. This bit automatically
transitions to 0 after the wakeup is complete. Once this bit is set, it cannot be cleared by
software.
Note: The driver must never execute a wakeup and a read/write operation at the same time.
30 ULPIRUN ULPI Run. Writing 1 to this bit begins a read/write operation. This bit automatically transitions
to 0 after the read/write is complete. Once this bit is set, it cannot be cleared by software.
Note: The driver must never execute a wakeup and a read/write operation at the same time.
29 ULPIRW This bit selects between running a read or write operation to the ULPI.
0 Read
1Write
28 — Reserved, should be cleared.
27 ULPISS This bit represents the state of the ULPI interface. Before reading this bit, the ULPIPORT field
should be set accordingly if used with the multi-port host. Otherwise, this field should always
remain 0.
0 Any other state (that is, carkit, serial, low power).
1 Normal Sync State.
26–24 ULPIPORT For wakeup or read/write operations this value selects the port number to which the ULPI PHY
is attached. Valid values are 0 and 1.