Information

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
lx Freescale Semiconductor
regarding bus timing, signal behavior, and AC, DC, and thermal characteristics, as well as other
design considerations.
For more information on other device documentation, refer to http://www.freescale.com.
Conventions
This document uses the following notational conventions:
cleared/set When a bit takes the value zero, it is said to be cleared; when it takes a value of
one, it is said to be set.
mnemonics Instruction mnemonics are shown in lowercase bold
italics Italics indicate variable command parameters, for example, bcctrx
Book titles in text are set in italics
Internal signals are set in lowercase italics, for example, core_int
0x0 Prefix to denote hexadecimal number
0b0 Prefix to denote binary number
rA, rB Instruction syntax used to identify a source GPR
rD Instruction syntax used to identify a destination GPR
REG[FIELD] Abbreviations for registers are shown in uppercase text. Specific bits, fields, or
ranges appear in brackets. For example, MSR[LE] refers to the little-endian mode
enable bit in the machine state register.
x In some contexts, such as signal encodings, an unitalicized x indicates a don’t care
x An italicized x indicates an alphanumeric variable
n An italicized n indicates a numeric variable
¬ NOT logical operator
& AND logical operator
| OR logical operator
|| Concatenation, for example TCR[WP]||TCR[WPEXT]
Indicates a reserved bit field in a register. Although these bits can be written to as
ones or zeros, they are always read as zeros.
Indicates a reserved bit field in a memory-mapped register. Although these bits
can be written to as ones or zeros, they are always read as zeros.
Indicates a read-only bit field in a memory-mapped register.
Indicates a write-only bit field in a memory-mapped register. Although these bits
can be written to as ones or zeros, they are always read as zeros.
—
R0
W
R FIELDNAME
W
R
W FIELDNAME