Information

Universal Serial Bus Interface
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
13-18 Freescale Semiconductor
13.3.2.5 Control Data Structure Segment Register (CTRLDSSEGMENT)
The CTRLDSSEGMENT register is not implemented on MPC8308.
13.3.2.6 Periodic Frame List Base Address Register (PERIODICLISTBASE)
This register contains the beginning address of the Periodic Frame List in the system memory. The host
controller driver loads this register prior to starting the schedule execution by the controller. The memory
structure referenced by this physical memory pointer is assumed to be 4-Kbyte aligned. The contents of
this register are combined with the frame index register (FRINDEX) to enable the controller to step
through the Periodic Frame List in sequence.
Note that this register is shared between the host and device mode functions. In host mode, it is the
PERIODICLISTBASE register; in device mode, it is the DEVICEADDR register. See Section 13.3.2.7,
“Device Address Register (DEVICEADDR)—Non-EHCI,” for more information.
Figure 13-12 shows the periodic frame list base address register.
Table 13-15 shows the periodic frame list base address register field descriptions.
13.3.2.7 Device Address Register (DEVICEADDR)—Non-EHCI
The device address register is not defined in the EHCI specification. In device mode, the upper seven bits
of this register represent the device address. After any controller reset or a USB reset, the device address
is set to the default address (0). The default address will match all incoming addresses. Software shall
reprogram the address after receiving a SET_ADDRESS descriptor.
110 16 elements (64 bytes) 6
111 8 elements (32 bytes) 5
Offset 0x154 Access: Read/Write
31 12 11 0
R
PERBASE
W
Reset nnnnnnnnnnnnnnnn0000000000000000
Figure 13-12. Periodic Frame List Base Address (PERIODICLISTBASE)
Table 13-15. PERIODICLISTBASE Register Field Descriptions
Bits Name Description
31–12 PERBASE Base address. Correspond to memory address signal [31:12]. Only used in the host mode.
11–0 Reserved, should be cleared.
Table 13-14. FRINDEX N Values (continued)
USBCMD[FS] Frame List Size FRINDEX N value