Information
DMA Controller (DMAC)
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
12-32 Freescale Semiconductor
12.7 TCD Status
This section discusses the two methods to test for minor loop completion and explains active channel TCD
reads.
12.7.1 Minor Loop Complete
There are two methods to test for minor loop completion when using software initiated service requests.
The first method is to read the TCD.citer field and test for a change. Another method may be extracted
from the sequence shown below. The second method is to test the TCD.start bit AND the TCD.active bit.
The minor loop complete condition is indicated by both bits reading zero after the TCD.start was written
to a one. Polling the TCD.active bit may be inconclusive because the active status may be missed if the
channel execution is short in duration. The TCD status bits execute the following sequence for a software
activated channel:
1. TCD.start = 1, TCD.active = 0, TCD.done = 0 (channel service request via software)
2. TCD.start = 0, TCD.active = 1, TCD.done = 0 (channel is executing)
3. TCD.start = 0, TCD.active = 0, TCD.done = 0 (channel has completed the minor loop and is idle) Or
4. TCD.start = 0, TCD.active = 0, TCD.done = 1 (channel has completed the major loop and is idle)
The major loop complete status is explicitly indicated through the TCD.done bit.
The TCD.start bit is cleared automatically when the channel begins execution.
12.7.2 Active Channel TCD Reads
While the channel is executing, if the TCD.saddr, TCD.daddr, and TCD.nbytes are read, the true values of
these fields are returned. The true values of TCD.saddr, TCD.daddr, and TCD.nbytes are the values that the
DMA engine is currently using in its internal register file (true values are not the values in the TCD local
memory for that channel).
The addresses (saddr and daddr) and nbytes (decrements to zero as the transfer progresses) can give an
indication of the progress of the transfer. All other values are read back from the TCD local memory.
12.7.3 Preemption status
Preemption is only available when fixed arbitration is selected for the channel arbitration modes. A
preempt-able situation is one in which a preempt-enabled channel is running and a higher priority request
becomes active. When the DMA engine is not operating in the fixed channel arbitration mode, the
determination of the relative priority of the actively running and the outstanding requests become
undefined. Channel priorities are treated as equal (or more exactly, constantly rotating) when round-robin
arbitration mode is selected.
The TCD.active bit for the preempted channel remains asserted throughout the preemption. The preempted
channel is temporarily suspended while the preempting channel executes one iteration of the major loop.
Two
TCD.active bits set at the same time in the overall TCD map indicates a higher priority channel is
actively preempting a lower priority channel.