Information

Enhanced Secure Digital Host Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
11-52 Freescale Semiconductor
send_command(SET_RELATIVE_ADDR, <...>);
retrieve RCA from response;
} // else if (card is labeled as SD ...)
else if (card is labeled as MMC or CE-ATA) { // treat CE-ATA as MMC
send_command(ALL_SEND_CID, <...>);
rca = 0x1; // arbitrarily set RCA, 1 here for example, this RCA is also the
// relative address to access the CE-ATA card
send_command(SET_RELATIVE_ADDR, 0x1 << 16, <...>);
// send RCA at upper 16 bits
} // end of else if (card is labeled as MMC...)
} while (response is not timeout);
}
11.6.3 Card Access
These sections describe the supported access modes with external cards.
11.6.3.1 Block Write
This section describes the process of writing data to external cards in block mode.
11.6.3.1.1 Normal Write
During block write (CMD24–27), one or more blocks of data are transferred from the host to the card with
a CRC appended to the end of each block by the host. If the CRC fails, the card should indicate the failure
on the SD_DAT line. The transferred data is discarded and not written, and all further transmitted blocks
(in multi-block write mode) are ignored.
If the host uses partial blocks whose accumulated length is not block-aligned and block misalignment is
not allowed (CSD parameter WRITE_BLK_MISALIGN is not set), the card detects the block
misalignment error and aborts programming before the beginning of the first misaligned block. The card
sets the ADDRESS_ERROR error bit in the status register, defined in the MMC/SD Specification, and then
waits in the receive-data state for a stop command while ignoring all further data transfers. The write
operation is also aborted if the host attempts to write over a write-protected area.
For MMC and SD cards, programming the CID and CSD registers does not require a previous block length
setting. The transferred data is also CRC protected. If a part of the CSD or CID register is stored in the
ROM, this unchangeable section must match the corresponding section of the receive buffer. If this match
fails, then the card reports an error and does not change any register contents.
Some cards may require a long and unpredictable period of time to write a block of data. After receiving
a block of data and completing the CRC check, the card begins writing. If its write buffer is full and unable
to accept new data from a new WRITE_BLOCK command, the card holds the SD_DAT line low. The host
may poll the status of the card with a SEND_STATUS command (CMD13) or other means for SDIO cards,
at any time and the card responds with its status. The card status indicates whether the card can accept new
data or if the write process is still in progress. The host may deselect the card by issuing CMD7 (to select
a different card) to change the card into the standby state and release the SD_DAT line without interrupting
the write operation. When re-selecting the card, it reactivates the busy indication by pulling SD_DAT low
if programming is still in progress and the write buffer is unavailable.