Information
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
l Freescale Semiconductor
Tables
Table
Number Title
Page
Number
14-113 PEX_HIPIVR Register Fields Description......................................................................... 14-93
14-114 PEX_HWDIVR Register Fields Description...................................................................... 14-93
14-115 PEX_HRDIVR Register Fields Description....................................................................... 14-94
14-116 PEX_HMIVR Register Fields Description......................................................................... 14-94
14-117 PEX_CSPIER Register Fields Description......................................................................... 14-95
14-118 PEX_CSWDIER Register Fields Description .................................................................... 14-96
14-119 PEX_CSRDIER Register Fields Description ..................................................................... 14-97
14-120 PEX_CSMIER Register Fields Description ....................................................................... 14-97
14-121 PEX_CSPISR Register Fields Description......................................................................... 14-99
14-122 PEX_CSWDISR Register Fields Description................................................................... 14-100
14-123 PEX_CSRDISR Register Fields Description.................................................................... 14-101
14-124 PEX_CSMISR Register Fields Description...................................................................... 14-101
14-125 PEX_PM_CTRL Register Fields Description .................................................................. 14-103
14-126 PEX_OWAR0–PEX_OWAR3 Register Fields Description ............................................. 14-104
14-127 PEX_OWBARn Register Fields Description ................................................................... 14-106
14-128 PEX_OWTARLn Register Fields Description.................................................................. 14-106
14-129 PEX_OWTARHn Register Fields Description ................................................................. 14-107
14-130 EP Inbound Base and Translation Address Registers Correspondence............................ 14-107
14-131 PEX_EPIWTARn Register Fields Description................................................................. 14-108
14-132 PEX_RCIWARn Register Fields Description................................................................... 14-109
14-133 PEX_RCIWTARn Register Fields Description ................................................................ 14-110
14-134 PEX_RCIWBARLn Register Fields Description ..............................................................14-111
14-135 PEX_RCIWBARHn Register Fields Description..............................................................14-111
14-136 Address Translation Window Combinations .................................................................... 14-113
14-137 PCI Express Transactions ................................................................................................. 14-114
14-138 Configuration Address Mapping....................................................................................... 14-117
14-139 PCI Express RC Inbound Message Handling ................................................................... 14-121
14-140 PCI Express EP Inbound Message Handling.................................................................... 14-122
14-141 Initial Credit Advertisement.............................................................................................. 14-124
14-142 Power Management State Supported ................................................................................ 14-126
14-143 DMA Descriptor Bit Fields Description ........................................................................... 14-129
15-1 SerDes External Signals—Detailed Signal Descriptions...................................................... 15-2
15-2 SerDes PHY Block Memory Map ........................................................................................ 15-3
15-3 SRDSCR0 Field Descriptions............................................................................................... 15-4
15-4 SRDSCR1 Field Descriptions............................................................................................... 15-6
15-5 SRDSCR2 Field Descriptions............................................................................................... 15-7
15-6 SRDSCR3 Field Descriptions............................................................................................... 15-8
15-7 SRDSCR4 Field Descriptions............................................................................................... 15-9
15-8 SRDSRSTCTL Field Descriptions ..................................................................................... 15-10
16-1 eTSECn Network Interface Signal Properties ...................................................................... 16-6
16-2 eTSEC Signals—Detailed Signal Descriptions .................................................................... 16-7