Information

Enhanced Secure Digital Host Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 11-21
There are three ways to restart the transfer after a stop at the block gap. The appropriate method depends
on whether the eSDHC issues a suspend command or the SD card accepts the suspend command:
• If the host driver does not issue a suspend command, the continue request should be used to restart
the transfer.
• If the host driver issues a suspend command and the SD card accepts it, a resume command should
be used to restart the transfer.
• If the host driver issues a suspend command and the SD card does not accept it, PROCTL[CREQ]
should be used to restart the transfer.
Any time PROCTL[SABGREQ] stops the data transfer, the host driver should wait for IRQSTAT[TC]
before attempting to restart the transfer. When restarting the data transfer by continue request, the host
driver should clear PROCTL[SABGREQ] before or simultaneously.
25 CDTL Card detect test level. Determines card insertion status when CDSS is set.
0 No card in the slot
1 Card is inserted
26–27 EMODE Endian mode. eSDHC supports only address-invariant mode in data transfer.
00 Reserved
01 Reserved
10 Address-invariant mode. Each byte location in the main memory is mapped to the same byte
location in the MMC/SD card.
11 Reserved
28 D3CD SD_DAT3 as card detection pin. If this bit is set, SD_DAT3 should be pulled down to act as a card
detection pin. Be cautious when using this feature, because SD_DAT3 is chip-select for SPI mode,
and a pull-down on this pin and CMD0 may set the card into SPI mode, which the eSDHC does not
support.
0 SD_DAT3 does not monitor card insertion
1 SD_DAT3 is card detection pin
29–30 DTW Data transfer width. Selects the data width of the SD bus. The host driver should set it to match the
data width of the card.
00 1-bit mode
01 4-bit mode
10 Reserved
11 Reserved
31 — Reserved
Table 11-12. PROCTL Field Descriptions (continued)
Bit Name Description