Information

Enhanced Secure Digital Host Controller

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1

11-14 Freescale Semiconductor

11.4.6 Buffer Data Port Register (DATPORT)

The buffer data port register, shown in Figure 11-8, is a 32-bit data port register used to access the internal

buffer.

NOTE

When the internal DMA is not enabled and a write transaction is in

operation, DATPORT must not be read. DATPORT also must not be used to

read (or write) data by the CPU if the data will be written (or read) by the

eSDHC internal DMA.

Table 11-10 describes the DATPORT fields.

Offset: 0x020 (DATPORT) Access: Read/Write

0 31

DATCONT

Reset All zeros

Figure 11-8. Buffer Data Port Register (DATPORT)

Table 11-10. DATPORT Field Descriptions

Bit Name Description

0–31 DATCONT Data content. The buffer data port register is for 32-bit data access by the CPU. When the

internal DMA is enabled, any write to this register is ignored, and a read from this register

always yields 0.