Information

Enhanced Secure Digital Host Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
11-4 Freescale Semiconductor
— SD Card Specification, Part E1, SD Input/Output (SDIO) Card Specification, Version 2.0
• Designed to work with SD Memory, miniSD Memory, SDIO, miniSDIO, SD Combo, SDIO,
MMC, MMCplus, and RS-MMCs
• Card bus clock frequency up to 50 MHz
• Supports 1-/4-bit SD and SDIO modes, 1-/4-bit MMC modes
— Up to 200 Mbps data transfer for SD cards/SDIO/MMCs using four parallel data lines
• Single- and multi-block read and write
• Supports block sizes of 1 ~ 4096 bytes
• Write-protection switch for write operations
• Synchronous abort
• Pause during the data transfer at a block gap
• SDIO read wait and suspend/resume operations
• Auto CMD12 for multi-block transfer
• Host can initiate non-data transfer commands while the data transfer is in progress
• Allows cards to interrupt the host in 1- and 4-bit SDIO modes
• Supports interrupt period, defined in the SDIO standard
• Fully configurable 128  32-bit FIFO for read/write data
• DMA capabilities
11.2.1 Data Transfer Modes
The eSDHC can select the following modes for data transfer:
• SD 1-bit
• SD 4-bit
• MMC 1-bit
• MMC 4-bit
• Identification mode (upto 400 KHz)
• Full-speed mode (up to 25 MHz) or high-speed mode (up to 50 MHz)
11.3 External Signal Description
The eSDHC has eight chip I/O signals.
• SD_CLK is the internally generated clock signal that drives the MMC, SDIO, or SD card.
• SD_CMD I/O sends commands and receives responses from the card.
• SD_DAT3–SD_DAT0 performs data transfers between the eSDHC and the card.
•SD_CD
and SD_WP are card detection and write protection signals from the socket.
— Signals SD_CD and SD_WP are optional for system implementation.