Information

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor xlvii
Tables
Table
Number Title
Page
Number
13-88 Interrupt/Bulk Endpoint Bus Response Matrix................................................................. 13-138
13-89 Control Endpoint Bus Response Matrix ........................................................................... 13-140
13-90 Isochronous Endpoint Bus Response Matrix.................................................................... 13-143
13-91 Device Error Matrix.......................................................................................................... 13-148
13-92 Error Descriptions............................................................................................................. 13-148
13-93 Interrupt Handling Order .................................................................................................. 13-148
13-94 Low Frequency Interrupt Events....................................................................................... 13-149
13-95 Error Interrupt Events ....................................................................................................... 13-149
13-96 Functional Differences Between EHCI and EHCI with Embedded TT ........................... 13-151
13-97 Emulated Handshakes....................................................................................................... 13-152
13-98 ULPI Timing ..................................................................................................................... 13-156
14-1 PCI Express Interface Signals—Detailed Signal Descriptions............................................. 14-5
14-2 PCI Express Controller Register Groups .............................................................................. 14-6
14-3 PCI Express Memory Map.................................................................................................... 14-6
14-4 PCI Express Vendor ID Register Field Description............................................................ 14-15
14-5 PCI Express Device ID Register Field Description............................................................ 14-15
14-6 PCI Express Command Register Fields Description .......................................................... 14-16
14-7 PCI Express Status Register Fields Description ................................................................. 14-17
14-8 PCI Express Revision ID Register Fields Description........................................................ 14-18
14-9 PCI Express Class Code Register Fields Description......................................................... 14-19
14-10 PCI Express Bus Cache Line Size Register Fields Description.......................................... 14-19
14-11 PCI Express Latency Timer Register Fields Description ................................................... 14-20
14-12 PCI Express Header Type Register Fields Description....................................................... 14-20
14-13 BAR0 and BAR1 Register Fields Description.................................................................... 14-22
14-14 BAR2 and BAR4 Register Fields Description.................................................................... 14-23
14-15 BAR3 and BAR5 Register Fields Description.................................................................... 14-23
14-16 PCI Express Subsystem Vendor ID Register Fields Description........................................ 14-24
14-17 PCI Express Subsystem ID Register Fields Description .................................................... 14-24
14-18 PCI Express Capabilities Pointer Register Fields Description ........................................... 14-25
14-19 PCI Express Interrupt Line Register Fields Description..................................................... 14-25
14-20 PCI Express MInimum Grant Register Fields Description................................................. 14-26
14-21 PCI Express Maximum Latency Register Fields Description ............................................ 14-26
14-22 PCI Express Primary Bus Number Register Fields Description......................................... 14-27
14-23 PCI Express Secondary Bus Number Register Fields Description..................................... 14-28
14-24 PCI Express Subordinate Bus Number Register Fields Description .................................. 14-28
14-25 PCI Express I/O Base Register Fields Description............................................................. 14-29
14-26 PCI Express I/O Limit Register Fields Description............................................................ 14-29
14-27 PCI Express Secondary Status Register Fields Description ............................................... 14-30
14-28 PCI Express Memory Base Register Fields Description .................................................... 14-31
14-29 PCI Express Memory Limit Register Fields Description ................................................... 14-31
14-30 PCI Express Prefetchable Memory Base Register Fields Description ............................... 14-32