Information

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor xli
Tables
Table
Number Title
Page
Number
8-36 MSIRs Field Descriptions..................................................................................................... 8-41
8-37 MSIMR Field Descriptions................................................................................................... 8-41
8-38 MSISR Field Descriptions ....................................................................................................8-42
8-39 MSIIR Field Descriptions ..................................................................................................... 8-43
9-1 DDR Memory Interface Signal Summary .............................................................................. 9-4
9-2 Memory Address Signal Mappings......................................................................................... 9-5
9-3 Memory Interface Signals—Detailed Signal Descriptions..................................................... 9-6
9-4 Clock Signals—Detailed Signal Descriptions ........................................................................ 9-9
9-5 DDR Memory Controller Memory Map................................................................................. 9-9
9-6 CSn_BNDS Field Descriptions............................................................................................. 9-11
9-7 CSn_CONFIG Field Descriptions ........................................................................................ 9-12
9-8 TIMING_CFG_3 Field Descriptions.................................................................................... 9-13
9-9 TIMING_CFG_0 Field Descriptions.................................................................................... 9-14
9-10 TIMING_CFG_1 Field Descriptions.................................................................................... 9-16
9-11 TIMING_CFG_2 Field Descriptions.................................................................................... 9-18
9-12 DDR_SDRAM_CFG Field Descriptions.............................................................................. 9-20
9-13 DDR_SDRAM_CFG_2 Field Descriptions.......................................................................... 9-22
9-14 DDR_SDRAM_MODE Field Descriptions.......................................................................... 9-24
9-15 DDR_SDRAM_MODE_2 Field Descriptions...................................................................... 9-24
9-16 DDR_SDRAM_MD_CNTL Field Descriptions................................................................... 9-25
9-17 Settings of DDR_SDRAM_MD_CNTL Fields.................................................................... 9-26
9-18 DDR_SDRAM_INTERVAL Field Descriptions .................................................................. 9-27
9-19 DDR_DATA_INIT Field Descriptions ................................................................................. 9-28
9-20 DDR_SDRAM_CLK_CNTL Field Descriptions ................................................................. 9-28
9-21 DDR_INIT_ADDR Field Descriptions ................................................................................ 9-29
9-22 DDR_IP_REV1 Field Descriptions ...................................................................................... 9-29
9-23 DDR_IP_REV2 Field Descriptions ...................................................................................... 9-30
9-24 DATA_ERR_INJECT_HI Field Descriptions....................................................................... 9-30
9-25 DATA_ERR_INJECT_LO Field Descriptions ..................................................................... 9-31
9-26 ERR_INJECT Field Descriptions ......................................................................................... 9-31
9-27 CAPTURE_DATA_HI Field Descriptions............................................................................ 9-32
9-28 CAPTURE_DATA_LO Field Descriptions........................................................................... 9-32
9-29 CAPTURE_ECC Field Descriptions .................................................................................... 9-33
9-30 ERR_DETECT Field Descriptions ....................................................................................... 9-33
9-31 ERR_DISABLE Field Descriptions...................................................................................... 9-34
9-32 ERR_INT_EN Field Descriptions ........................................................................................ 9-35
9-33 CAPTURE_ATTRIBUTES Field Descriptions .................................................................... 9-36
9-34 CAPTURE_ADDRESS Field Descriptions.......................................................................... 9-37
9-35 ERR_SBE Field Descriptions ............................................................................................... 9-37
9-36 Byte Lane to Data Relationship ............................................................................................ 9-42
9-37 Supported DDR2 SDRAM Device Configurations .............................................................. 9-43