Information

Enhanced Local Bus Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
10-22 Freescale Semiconductor
Table 10-13 describes MDR[D].
10.3.1.7 Special Operation Initiation Register (LSOR)
The special operation initiation register (LSOR), shown in Figure 10-11, is used by software to trigger a
special operation on the indicated bank. Writing to LSOR activates a special operation on bank
LSOR[BANK] provided that the bank is valid and controlled by a memory controller whose mode OP field
is set to a value other than ‘normal operation.’ If eLBC is currently busy with a memory transaction,
writing LSOR completes immediately, but the special operation request is queued until eLBC can service
it. To avoid race conditions between software and a busy eLBC, registers that affect currently running
special operation and LSOR must not be re-written before a pending special operation has been completed.
The UPM and FCM have different indications of when such special operations are completed. The
behavior of eLBC is unpredictable if special operation modes are altered between LSOR being written and
the relevant memory controller completing that access.
UPM special operation modes are set in registers MxMR[OP], see Section 10.3.1.4, “UPM Mode
Registers (MxMR).” FCM special operation modes are set in FMR[OP], see Section 10.3.1.17, “Flash
Offset 0x0_5088 Access: Read/Write
0 31
R
D
W
Reset All zeros
Figure 10-9. UPM Data Register in UPM Mode (MDR)
Offset 0x0_5088 Access: Read/Write
0781516232431
R
AS3 AS2 AS1 AS0
W
Reset All zeros
Figure 10-10. FCM Data Register in FCM Mode (MDR)
Table 10-13. MDR Field Description
Bits Name Description
0–31 D In UPM mode, D is the data to be read or written into the RAM array when a write or read command is
supplied to the UPM (MxMR[OP] = 01 or MxMR[OP] = 10).
0–7 AS3 In FCM mode, AS3 is the fourth byte of address sent by a custom address write operation, or the fourth byte
of data read from a read status operation.
8–15 AS2 In FCM mode, AS2 is the third byte of address sent by a custom address write operation, or the third byte of
data read from a read status operation.
16–23 AS1 In FCM mode, AS1 is the second byte of address sent by a custom address write operation, or the second
byte of data read from a read status operation.
24–31 AS0 In FCM mode, AS0 is the first byte of address sent by a custom address write operation, or the first byte of
data read from a read status operation.