Information
Enhanced Local Bus Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
10-4 Freescale Semiconductor
10.1.3.2 Source ID Debug Mode
The eLBC provides the ID of a transaction source on external device pins. When those pins are selected,
the 5-bit internal ID of the current transaction source appears on LSRCID[0:4] whenever valid address or
data is available on the eLBC external pins. When LDVAL and LCS
is asserted, valid address and data is
captured from the LA and LD bus respectively.
The LSRCID[0:4] and LDVAL signals are multiplexed with other functions sharing the same external
pins. Refer to Chapter 2, “Signal Descriptions,” and Chapter 4, “Reset, Clocking, and Initialization,” to
learn how to enable the LSRCID/LDVAL pins.
10.2 External Signal Descriptions
Table 10-1 contains a list of external signals related to the eLBC and summarizes their function. The table
also shows the reset state of all external signals during assertion of HRESET. For more information on the
use of some of these signals as reset configuration signals on the device, see “Power on Reset Flow.”
Table 10-1. Signal Properties—Summary
Name
Alternate
Function(s)
Mode Descriptions
No. of
Signals
I/O
Reset State
(Outputs)
LCS
[0:3] — — Chip selects 0–3 4 O Reset_cfg
LWE0/
LFWE0/
LBS0
LWE0 GPCM Write enable 0 1 O Reset_cfg
LFWE0 FCM Write enable 1
LBS0 UPM Byte (lane) select 0 1
LWE1/
LBS1
LWE1 GPCM Write enable 1 1 O Reset_cfg
LBS1 UPM Byte (lane) select 1 1
LGPL0/
LFCLE
LGPL0 UPM General purpose line 0 1 O Reset_cfg
LFCLE FCM Flash command latch enable 1
LGPL1/
LFALE
LGPL1 UPM General purpose line 1 1 O Reset_cfg
LFALE FCM Flash address latch enable 1
LOE
/
LGPL2/
LFRE
LOE GPCM Output enable 1 O
LFRE FCM Flash read enable 1
LGPL2 UPM General purpose line 2 1
LGPL3/
LFWP
LGPL3 UPM General purpose line 3 1 O Reset_cfg
LFWP FCM Flash write protect 1
LGTA/
LFRB
/
LGPL4/
LUPWAIT
LGTA
GPCM Transaction termination 1 I High-Z
LFRB FCM Flash ready/busy, open-drain shared pin 1 I
LGPL4 UPM General purpose line 4 1 O
LUPWAIT UPM External device wait 1 I
LGPL5 — UPM General purpose line 5 1 O Reset_cfg